mirror of https://github.com/hak5/openwrt.git
340 lines
5.4 KiB
Plaintext
340 lines
5.4 KiB
Plaintext
#include "qcom-ipq8064-v2.0.dtsi"
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/soc/qcom,tcsr.h>
|
|
|
|
/ {
|
|
model = "Edgecore ECW5410";
|
|
compatible = "edgecore,ecw5410", "qcom,ipq8064";
|
|
|
|
reserved-memory {
|
|
nss@40000000 {
|
|
reg = <0x40000000 0x1000000>;
|
|
no-map;
|
|
};
|
|
|
|
smem: smem@41000000 {
|
|
reg = <0x41000000 0x200000>;
|
|
no-map;
|
|
};
|
|
|
|
wifi_dump@44000000 {
|
|
reg = <0x44000000 0x600000>;
|
|
no-map;
|
|
};
|
|
};
|
|
|
|
cpus {
|
|
idle-states {
|
|
CPU_SPC: spc {
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
serial1 = &gsbi1_serial;
|
|
mdio-gpio0 = &mdio0;
|
|
ethernet0 = &gmac3;
|
|
ethernet1 = &gmac2;
|
|
|
|
led-boot = &led_power_green;
|
|
led-failsafe = &led_power_red;
|
|
led-running = &led_power_green;
|
|
led-upgrade = &led_power_green;
|
|
};
|
|
|
|
chosen {
|
|
bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-0 = <&button_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-0 = <&led_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
led_power_green: power_green {
|
|
label = "ecw5410:green:power";
|
|
gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
wlan2g_green {
|
|
label = "ecw5410:green:wlan2g";
|
|
gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan2g_yellow {
|
|
label = "ecw5410:yellow:wlan2g";
|
|
gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5g_green {
|
|
label = "ecw5410:green:wlan5g";
|
|
gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_power_red: power_red {
|
|
label = "ecw5410:red:power";
|
|
gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5g_yellow {
|
|
label = "ecw5410:yellow:wlan5g";
|
|
gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
&qcom_pinmux {
|
|
spi_pins: spi_pins {
|
|
mux {
|
|
pins = "gpio18", "gpio19";
|
|
function = "gsbi5";
|
|
drive-strength = <10>;
|
|
bias-pull-down;
|
|
};
|
|
|
|
clk {
|
|
pins = "gpio21";
|
|
function = "gsbi5";
|
|
drive-strength = <12>;
|
|
bias-pull-down;
|
|
};
|
|
|
|
cs {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
drive-strength = <10>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
led_pins: led_pins {
|
|
mux {
|
|
pins = "gpio16", "gpio23", "gpio24", "gpio26",
|
|
"gpio28", "gpio59";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
button_pins: button_pins {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
uart1_pins: uart1_pins {
|
|
mux {
|
|
pins = "gpio51", "gpio52", "gpio53", "gpio54";
|
|
function = "gsbi1";
|
|
drive-strength = <12>;
|
|
bias-none;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsbi1 {
|
|
qcom,mode = <GSBI_PROT_UART_W_FC>;
|
|
status = "okay";
|
|
|
|
serial@12450000 {
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&uart1_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
};
|
|
|
|
&gsbi5 {
|
|
qcom,mode = <GSBI_PROT_SPI>;
|
|
status = "okay";
|
|
|
|
spi4: spi@1a280000 {
|
|
status = "okay";
|
|
spi-max-frequency = <50000000>;
|
|
|
|
pinctrl-0 = <&spi_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
|
|
|
|
m25p80@0 {
|
|
compatible = "jedec,spi-nor";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
|
|
partitions {
|
|
compatible = "qcom,smem";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&hs_phy_0 { /* USB3 port 0 HS phy */
|
|
status = "okay";
|
|
};
|
|
|
|
&hs_phy_1 { /* USB3 port 1 HS phy */
|
|
status = "okay";
|
|
};
|
|
|
|
&ss_phy_0 { /* USB3 port 0 SS phy */
|
|
status = "okay";
|
|
};
|
|
|
|
&ss_phy_1 { /* USB3 port 1 SS phy */
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie1 {
|
|
status = "okay";
|
|
|
|
/delete-property/ pinctrl-0;
|
|
/delete-property/ pinctrl-names;
|
|
/delete-property/ perst-gpios;
|
|
|
|
bridge@0,0 {
|
|
reg = <0x00000000 0 0 0 0>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
wifi@1,0 {
|
|
compatible = "qcom,ath10k";
|
|
status = "okay";
|
|
reg = <0x00010000 0 0 0 0>;
|
|
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie2 {
|
|
status = "okay";
|
|
|
|
/delete-property/ pinctrl-0;
|
|
/delete-property/ pinctrl-names;
|
|
/delete-property/ perst-gpios;
|
|
|
|
bridge@0,0 {
|
|
reg = <0x00000000 0 0 0 0>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
wifi@1,0 {
|
|
compatible = "qcom,ath10k";
|
|
status = "okay";
|
|
reg = <0x00010000 0 0 0 0>;
|
|
qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
|
|
};
|
|
};
|
|
};
|
|
|
|
&soc {
|
|
nand@1ac00000 {
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&nand_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
nand@0 {
|
|
compatible = "qcom,nandcs";
|
|
|
|
reg = <0>;
|
|
|
|
nand-ecc-strength = <4>;
|
|
nand-bus-width = <8>;
|
|
nand-ecc-step-size = <512>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
rootfs1@0 {
|
|
label = "rootfs1";
|
|
reg = <0x0000000 0x4000000>;
|
|
};
|
|
|
|
rootfs2@4000000 {
|
|
label = "rootfs2";
|
|
reg = <0x4000000 0x4000000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
mdio1: mdio {
|
|
compatible = "virtual,mdio-gpio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-0 = <&mdio0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
|
|
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gmac2 {
|
|
status = "okay";
|
|
|
|
qcom,id = <2>;
|
|
mdiobus = <&mdio0>;
|
|
|
|
phy-mode = "sgmii";
|
|
phy-handle = <&phy1>;
|
|
};
|
|
|
|
&gmac3 {
|
|
status = "okay";
|
|
|
|
qcom,id = <3>;
|
|
mdiobus = <&mdio1>;
|
|
|
|
phy-mode = "sgmii";
|
|
phy-handle = <&phy0>;
|
|
};
|
|
|
|
&adm_dma {
|
|
status = "okay";
|
|
};
|