mirror of https://github.com/hak5/openwrt.git
163 lines
4.7 KiB
Diff
163 lines
4.7 KiB
Diff
From f0d9d0f4b44ae5503ea368e7f066b20f12ca1d37 Mon Sep 17 00:00:00 2001
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From: Matthew McClintock <mmcclint@codeaurora.org>
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Date: Wed, 29 Jun 2016 10:50:01 -0700
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Subject: watchdog: qcom: add option for standalone watchdog not in timer block
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Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree
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binding") moved to use the watchdog as a subset timer
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register block. Some devices have the watchdog completely
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standalone with slightly different register offsets as
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well so let's account for the differences here.
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The existing "kpss-standalone" compatible string doesn't
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make it entirely clear exactly what the device is so
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rename to "kpss-wdt" to reflect watchdog timer
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functionality. Also update ipq4019 DTS with an SoC
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specific compatible.
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Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
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Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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Reviewed-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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.../devicetree/bindings/watchdog/qcom-wdt.txt | 2 +
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
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drivers/watchdog/qcom-wdt.c | 64 ++++++++++++++++------
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3 files changed, 51 insertions(+), 17 deletions(-)
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--- a/drivers/watchdog/qcom-wdt.c
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+++ b/drivers/watchdog/qcom-wdt.c
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@@ -18,19 +18,42 @@
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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+#include <linux/of_device.h>
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-#define WDT_RST 0x38
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-#define WDT_EN 0x40
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-#define WDT_STS 0x44
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-#define WDT_BITE_TIME 0x5C
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+enum wdt_reg {
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+ WDT_RST,
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+ WDT_EN,
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+ WDT_STS,
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+ WDT_BITE_TIME,
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+};
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+
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+static const u32 reg_offset_data_apcs_tmr[] = {
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+ [WDT_RST] = 0x38,
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+ [WDT_EN] = 0x40,
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+ [WDT_STS] = 0x44,
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+ [WDT_BITE_TIME] = 0x5C,
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+};
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+
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+static const u32 reg_offset_data_kpss[] = {
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+ [WDT_RST] = 0x4,
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+ [WDT_EN] = 0x8,
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+ [WDT_STS] = 0xC,
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+ [WDT_BITE_TIME] = 0x14,
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+};
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struct qcom_wdt {
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struct watchdog_device wdd;
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struct clk *clk;
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unsigned long rate;
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void __iomem *base;
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+ const u32 *layout;
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};
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+static void __iomem *wdt_addr(struct qcom_wdt *wdt, enum wdt_reg reg)
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+{
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+ return wdt->base + wdt->layout[reg];
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+}
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+
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static inline
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struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
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{
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@@ -41,10 +64,10 @@ static int qcom_wdt_start(struct watchdo
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{
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struct qcom_wdt *wdt = to_qcom_wdt(wdd);
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- writel(0, wdt->base + WDT_EN);
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- writel(1, wdt->base + WDT_RST);
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- writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
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- writel(1, wdt->base + WDT_EN);
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+ writel(0, wdt_addr(wdt, WDT_EN));
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+ writel(1, wdt_addr(wdt, WDT_RST));
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+ writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME));
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+ writel(1, wdt_addr(wdt, WDT_EN));
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return 0;
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}
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@@ -52,7 +75,7 @@ static int qcom_wdt_stop(struct watchdog
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{
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struct qcom_wdt *wdt = to_qcom_wdt(wdd);
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- writel(0, wdt->base + WDT_EN);
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+ writel(0, wdt_addr(wdt, WDT_EN));
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return 0;
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}
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@@ -60,7 +83,7 @@ static int qcom_wdt_ping(struct watchdog
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{
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struct qcom_wdt *wdt = to_qcom_wdt(wdd);
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- writel(1, wdt->base + WDT_RST);
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+ writel(1, wdt_addr(wdt, WDT_RST));
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return 0;
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}
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@@ -83,10 +106,10 @@ static int qcom_wdt_restart(struct watch
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*/
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timeout = 128 * wdt->rate / 1000;
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- writel(0, wdt->base + WDT_EN);
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- writel(1, wdt->base + WDT_RST);
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- writel(timeout, wdt->base + WDT_BITE_TIME);
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- writel(1, wdt->base + WDT_EN);
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+ writel(0, wdt_addr(wdt, WDT_EN));
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+ writel(1, wdt_addr(wdt, WDT_RST));
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+ writel(timeout, wdt_addr(wdt, WDT_BITE_TIME));
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+ writel(1, wdt_addr(wdt, WDT_EN));
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/*
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* Actually make sure the above sequence hits hardware before sleeping.
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@@ -119,9 +142,16 @@ static int qcom_wdt_probe(struct platfor
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struct qcom_wdt *wdt;
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struct resource *res;
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struct device_node *np = pdev->dev.of_node;
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+ const u32 *regs;
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u32 percpu_offset;
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int ret;
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+ regs = of_device_get_match_data(&pdev->dev);
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+ if (!regs) {
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+ dev_err(&pdev->dev, "Unsupported QCOM WDT module\n");
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+ return -ENODEV;
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+ }
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+
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wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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@@ -172,6 +202,7 @@ static int qcom_wdt_probe(struct platfor
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wdt->wdd.min_timeout = 1;
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wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
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wdt->wdd.parent = &pdev->dev;
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+ wdt->layout = regs;
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if (readl(wdt->base + WDT_STS) & 1)
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wdt->wdd.bootstatus = WDIOF_CARDRESET;
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@@ -208,8 +239,9 @@ static int qcom_wdt_remove(struct platfo
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}
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static const struct of_device_id qcom_wdt_of_table[] = {
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- { .compatible = "qcom,kpss-timer" },
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- { .compatible = "qcom,scss-timer" },
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+ { .compatible = "qcom,kpss-timer", .data = reg_offset_data_apcs_tmr },
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+ { .compatible = "qcom,scss-timer", .data = reg_offset_data_apcs_tmr },
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+ { .compatible = "qcom,kpss-wdt", .data = reg_offset_data_kpss },
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{ },
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};
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MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
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