mirror of https://github.com/hak5/openwrt.git
42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
From ae0e9ee3bcfafc5bd5932b544e0a5c107948fc97 Mon Sep 17 00:00:00 2001
|
|
From: Andy Gross <agross@codeaurora.org>
|
|
Date: Mon, 30 Jun 2014 21:17:26 -0500
|
|
Subject: [PATCH 181/182] mtd: nand: qcom: Align clk and reset names
|
|
|
|
This patch aligns the clk and reset names to the same ones that the dmaengine
|
|
driver uses.
|
|
|
|
Signed-off-by: Andy Gross <agross@codeaurora.org>
|
|
---
|
|
drivers/mtd/nand/qcom_adm_dma.c | 6 +++---
|
|
1 file changed, 3 insertions(+), 3 deletions(-)
|
|
|
|
--- a/drivers/mtd/nand/qcom_adm_dma.c
|
|
+++ b/drivers/mtd/nand/qcom_adm_dma.c
|
|
@@ -568,14 +568,14 @@ static int msm_dmov_init_clocks(struct p
|
|
int adm = (pdev->id >= 0) ? pdev->id : 0;
|
|
int ret;
|
|
|
|
- dmov_conf[adm].clk = devm_clk_get(&pdev->dev, "core_clk");
|
|
+ dmov_conf[adm].clk = devm_clk_get(&pdev->dev, "core");
|
|
if (IS_ERR(dmov_conf[adm].clk)) {
|
|
printk(KERN_ERR "%s: Error getting adm_clk\n", __func__);
|
|
dmov_conf[adm].clk = NULL;
|
|
return -ENOENT;
|
|
}
|
|
|
|
- dmov_conf[adm].pclk = devm_clk_get(&pdev->dev, "iface_clk");
|
|
+ dmov_conf[adm].pclk = devm_clk_get(&pdev->dev, "iface");
|
|
if (IS_ERR(dmov_conf[adm].pclk)) {
|
|
dmov_conf[adm].pclk = NULL;
|
|
/* pclk not present on all SoCs, don't bail on failure */
|
|
@@ -690,7 +690,7 @@ static int msm_dmov_probe(struct platfor
|
|
}
|
|
|
|
/* get resets */
|
|
- dmov_conf[adm].adm_reset = devm_reset_control_get(&pdev->dev, "adm");
|
|
+ dmov_conf[adm].adm_reset = devm_reset_control_get(&pdev->dev, "clk");
|
|
if (IS_ERR(dmov_conf[adm].adm_reset)) {
|
|
dev_err(&pdev->dev, "failed to get adm reset\n");
|
|
ret = PTR_ERR(dmov_conf[adm].adm_reset);
|