mirror of https://github.com/hak5/openwrt.git
99 lines
3.0 KiB
Diff
99 lines
3.0 KiB
Diff
From 35eb6f73546d3b9475652a38fa641bd1a05a1ea1 Mon Sep 17 00:00:00 2001
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From: Kumar Gala <galak@codeaurora.org>
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Date: Tue, 4 Feb 2014 15:38:45 -0600
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Subject: [PATCH 007/182] ARM: qcom: Rename various msm prefixed functions to
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qcom
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As mach-qcom will support a number of different Qualcomm SoC platforms
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we replace the msm prefix on function names with qcom to be a bit more
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generic.
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Signed-off-by: Kumar Gala <galak@codeaurora.org>
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---
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arch/arm/mach-qcom/board.c | 4 ++--
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arch/arm/mach-qcom/platsmp.c | 22 +++++++++++-----------
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2 files changed, 13 insertions(+), 13 deletions(-)
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--- a/arch/arm/mach-qcom/board.c
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+++ b/arch/arm/mach-qcom/board.c
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@@ -17,7 +17,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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-extern struct smp_operations msm_smp_ops;
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+extern struct smp_operations qcom_smp_ops;
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static const char * const qcom_dt_match[] __initconst = {
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"qcom,msm8660-surf",
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@@ -31,7 +31,7 @@ static const char * const apq8074_dt_mat
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};
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DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
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- .smp = smp_ops(msm_smp_ops),
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+ .smp = smp_ops(qcom_smp_ops),
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.dt_compat = qcom_dt_match,
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MACHINE_END
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--- a/arch/arm/mach-qcom/platsmp.c
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+++ b/arch/arm/mach-qcom/platsmp.c
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@@ -30,7 +30,7 @@ extern void secondary_startup(void);
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static DEFINE_SPINLOCK(boot_lock);
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#ifdef CONFIG_HOTPLUG_CPU
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-static void __ref msm_cpu_die(unsigned int cpu)
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+static void __ref qcom_cpu_die(unsigned int cpu)
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{
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wfi();
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}
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@@ -42,7 +42,7 @@ static inline int get_core_count(void)
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return ((read_cpuid_id() >> 4) & 3) + 1;
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}
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-static void msm_secondary_init(unsigned int cpu)
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+static void qcom_secondary_init(unsigned int cpu)
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{
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/*
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* Synchronise with the boot thread.
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@@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned in
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"address\n");
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}
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-static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
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+static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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static int cold_boot_done;
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@@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned i
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* does not support the ARM SCU, so just set the possible cpu mask to
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* NR_CPUS.
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*/
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-static void __init msm_smp_init_cpus(void)
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+static void __init qcom_smp_init_cpus(void)
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{
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unsigned int i, ncores = get_core_count();
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@@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(voi
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set_cpu_possible(i, true);
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}
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-static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
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+static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
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{
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}
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-struct smp_operations msm_smp_ops __initdata = {
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- .smp_init_cpus = msm_smp_init_cpus,
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- .smp_prepare_cpus = msm_smp_prepare_cpus,
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- .smp_secondary_init = msm_secondary_init,
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- .smp_boot_secondary = msm_boot_secondary,
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+struct smp_operations qcom_smp_ops __initdata = {
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+ .smp_init_cpus = qcom_smp_init_cpus,
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+ .smp_prepare_cpus = qcom_smp_prepare_cpus,
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+ .smp_secondary_init = qcom_secondary_init,
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+ .smp_boot_secondary = qcom_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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- .cpu_die = msm_cpu_die,
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+ .cpu_die = qcom_cpu_die,
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#endif
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};
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