mirror of https://github.com/hak5/openwrt.git
43 lines
1.7 KiB
Diff
43 lines
1.7 KiB
Diff
From 8ef5143f743a4e922fdf0029f81452d3d7003daf Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.org>
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Date: Wed, 29 Jan 2020 09:35:19 +0000
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Subject: [PATCH] tty: amba-pl011: Avoid rare write-when-full error
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Under some circumstances on BCM283x processors data loss can be
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observed - a single byte missing from the TX output stream. These bytes
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are always the last byte of a batch of 8 written from pl011_tx_chars
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when from_irq is true, meaning that the FIFO full flag is not checked
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before writing.
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The transmit optimisation relies on the FIFO being half-empty when the
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TX interrupt is raised. Instrumenting the driver further showed that
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the failure case correlated with the TX FIFO full flag being set at the
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point where the last byte was written to the data register, which
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explains the data loss but not how the FIFO appeared to be prematurely
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full. A possible explanation is that a FIFO write was in flight at the
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time the interrupt was raised, but as yet there is no hypothesis as to
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how this might occur.
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In the absence of a clear understanding of the failure mechanism, avoid
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the problem by checking the FIFO levels before writing the last byte of
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the group, which will have minimal performance impact.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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drivers/tty/serial/amba-pl011.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/tty/serial/amba-pl011.c
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+++ b/drivers/tty/serial/amba-pl011.c
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@@ -1444,6 +1444,10 @@ static bool pl011_tx_chars(struct uart_a
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if (likely(from_irq) && count-- == 0)
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break;
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+ if (likely(from_irq) && count == 0 &&
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+ pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
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+ break;
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+
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if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq))
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break;
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