mirror of https://github.com/hak5/openwrt.git
777 lines
22 KiB
Diff
777 lines
22 KiB
Diff
From bb4781b1dac98688a3cf64cf728a64d811ca6add Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?J=C3=B6rg=20Schambacher?=
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<j-schambacher@users.noreply.github.com>
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Date: Tue, 21 Jan 2020 15:58:39 +0100
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Subject: [PATCH] sound: Add the HiFiBerry DAC+HD version
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This adds the driver for the DAC+HD version supporting HiFiBerry's
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PCM179x based DACs. It also adds PLL control for clock generation.
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Signed-off-by: Joerg Schambacher <joerg@i2audio.com>
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 6 +
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.../overlays/hifiberry-dacplushd-overlay.dts | 106 ++++++
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drivers/clk/Makefile | 1 +
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drivers/clk/clk-hifiberry-dachd.c | 333 ++++++++++++++++++
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sound/soc/bcm/Kconfig | 7 +
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sound/soc/bcm/Makefile | 2 +
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sound/soc/bcm/hifiberry_dacplushd.c | 235 ++++++++++++
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13 files changed, 696 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
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create mode 100644 drivers/clk/clk-hifiberry-dachd.c
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create mode 100644 sound/soc/bcm/hifiberry_dacplushd.c
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -57,6 +57,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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hifiberry-dacplusadc.dtbo \
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hifiberry-dacplusadcpro.dtbo \
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hifiberry-dacplusdsp.dtbo \
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+ hifiberry-dacplushd.dtbo \
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hifiberry-digi.dtbo \
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hifiberry-digi-pro.dtbo \
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hy28a.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -956,6 +956,12 @@ Load: dtoverlay=hifiberry-dacplusdsp
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Params: <None>
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+Name: hifiberry-dacplushd
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+Info: Configures the HifiBerry DAC+ HD audio card
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+Load: dtoverlay=hifiberry-dacplushd
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+Params: <None>
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+
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+
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Name: hifiberry-digi
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Info: Configures the HifiBerry Digi and Digi+ audio card
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Load: dtoverlay=hifiberry-digi
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
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@@ -0,0 +1,106 @@
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+// Definitions for HiFiBerry DAC+ HD
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+/dts-v1/;
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+/plugin/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+
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+ fragment@0 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ dachd_osc: pll_dachd_osc {
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+ compatible = "hifiberry,dachd-clk";
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+ #clock-cells = <0>;
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&i2s>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&i2c1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ pcm1792a@4c {
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+ compatible = "ti,pcm1792a";
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+ #sound-dai-cells = <0>;
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+ #clock-cells = <0>;
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+ clocks = <&dachd_osc>;
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+ reg = <0x4c>;
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+ status = "okay";
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+ };
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+ pll: pll@62 {
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+ compatible = "hifiberry,dachd-clk";
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+ #clock-cells = <0>;
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+ reg = <0x62>;
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+ clocks = <&dachd_osc>;
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+ status = "okay";
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+ common_pll_regs = [
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+ 02 53 03 00 07 20 0F 00
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+ 10 0D 11 1D 12 0D 13 8C
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+ 14 8C 15 8C 16 8C 17 8C
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+ 18 2A 1C 00 1D 0F 1F 00
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+ 2A 00 2C 00 2F 00 30 00
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+ 31 00 32 00 34 00 37 00
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+ 38 00 39 00 3A 00 3B 01
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+ 3E 00 3F 00 40 00 41 00
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+ 5A 00 5B 00 95 00 96 00
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+ 97 00 98 00 99 00 9A 00
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+ 9B 00 A2 00 A3 00 A4 00
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+ B7 92 ];
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+ 192k_pll_regs = [
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+ 1A 0C 1B 35 1E F0 20 09
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+ 21 50 2B 02 2D 10 2E 40
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+ 33 01 35 22 36 80 3C 22
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+ 3D 46 ];
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+ 96k_pll_regs = [
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+ 1A 0C 1B 35 1E F0 20 09
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+ 21 50 2B 02 2D 10 2E 40
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+ 33 01 35 47 36 00 3C 32
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+ 3D 46 ];
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+ 48k_pll_regs = [
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+ 1A 0C 1B 35 1E F0 20 09
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+ 21 50 2B 02 2D 10 2E 40
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+ 33 01 35 90 36 00 3C 42
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+ 3D 46 ];
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+ 176k4_pll_regs = [
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+ 1A 3D 1B 09 1E F3 20 13
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+ 21 75 2B 04 2D 11 2E E0
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+ 33 02 35 25 36 C0 3C 22
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+ 3D 7A ];
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+ 88k2_pll_regs = [
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+ 1A 3D 1B 09 1E F3 20 13
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+ 21 75 2B 04 2D 11 2E E0
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+ 33 01 35 4D 36 80 3C 32
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+ 3D 7A ];
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+ 44k1_pll_regs = [
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+ 1A 3D 1B 09 1E F3 20 13
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+ 21 75 2B 04 2D 11 2E E0
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+ 33 01 35 9D 36 00 3C 42
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+ 3D 7A ];
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+ };
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+ };
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+ };
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+
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+ fragment@3 {
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+ target = <&sound>;
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+ __overlay__ {
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+ compatible = "hifiberry,hifiberry-dacplushd";
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+ i2s-controller = <&i2s>;
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+ clocks = <&pll 0>;
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+ reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+ };
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+ };
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+
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+};
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--- a/drivers/clk/Makefile
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+++ b/drivers/clk/Makefile
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@@ -32,6 +32,7 @@ obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o
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obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += clk-hifiberry-dacpro.o
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+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD) += clk-hifiberry-dachd.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o
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obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
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--- /dev/null
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+++ b/drivers/clk/clk-hifiberry-dachd.c
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@@ -0,0 +1,333 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Clock Driver for HiFiBerry DAC+ HD
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+ *
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+ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry
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+ * Copyright 2020
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * version 2 as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but
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+ * WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ */
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+
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+#include <linux/clk-provider.h>
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+#include <linux/clk.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/slab.h>
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+#include <linux/platform_device.h>
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+#include <linux/i2c.h>
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+#include <linux/regmap.h>
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+
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+#define NO_PLL_RESET 0
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+#define PLL_RESET 1
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+#define HIFIBERRY_PLL_MAX_REGISTER 256
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+#define DEFAULT_RATE 44100
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+
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+static struct reg_default hifiberry_pll_reg_defaults[] = {
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+ {0x02, 0x53}, {0x03, 0x00}, {0x07, 0x20}, {0x0F, 0x00},
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+ {0x10, 0x0D}, {0x11, 0x1D}, {0x12, 0x0D}, {0x13, 0x8C},
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+ {0x14, 0x8C}, {0x15, 0x8C}, {0x16, 0x8C}, {0x17, 0x8C},
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+ {0x18, 0x2A}, {0x1C, 0x00}, {0x1D, 0x0F}, {0x1F, 0x00},
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+ {0x2A, 0x00}, {0x2C, 0x00}, {0x2F, 0x00}, {0x30, 0x00},
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+ {0x31, 0x00}, {0x32, 0x00}, {0x34, 0x00}, {0x37, 0x00},
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+ {0x38, 0x00}, {0x39, 0x00}, {0x3A, 0x00}, {0x3B, 0x01},
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+ {0x3E, 0x00}, {0x3F, 0x00}, {0x40, 0x00}, {0x41, 0x00},
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+ {0x5A, 0x00}, {0x5B, 0x00}, {0x95, 0x00}, {0x96, 0x00},
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+ {0x97, 0x00}, {0x98, 0x00}, {0x99, 0x00}, {0x9A, 0x00},
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+ {0x9B, 0x00}, {0xA2, 0x00}, {0xA3, 0x00}, {0xA4, 0x00},
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+ {0xB7, 0x92},
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+ {0x1A, 0x3D}, {0x1B, 0x09}, {0x1E, 0xF3}, {0x20, 0x13},
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+ {0x21, 0x75}, {0x2B, 0x04}, {0x2D, 0x11}, {0x2E, 0xE0},
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+ {0x3D, 0x7A},
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+ {0x35, 0x9D}, {0x36, 0x00}, {0x3C, 0x42},
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+ { 177, 0xAC},
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+};
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+static struct reg_default common_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_common_pll_regs;
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+static struct reg_default dedicated_192k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_192k_pll_regs;
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+static struct reg_default dedicated_96k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_96k_pll_regs;
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+static struct reg_default dedicated_48k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_48k_pll_regs;
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+static struct reg_default dedicated_176k4_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_176k4_pll_regs;
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+static struct reg_default dedicated_88k2_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_88k2_pll_regs;
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+static struct reg_default dedicated_44k1_pll_regs[HIFIBERRY_PLL_MAX_REGISTER];
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+static int num_dedicated_44k1_pll_regs;
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+
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+/**
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+ * struct clk_hifiberry_drvdata - Common struct to the HiFiBerry DAC HD Clk
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+ * @hw: clk_hw for the common clk framework
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+ */
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+struct clk_hifiberry_drvdata {
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+ struct regmap *regmap;
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+ struct clk *clk;
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+ struct clk_hw hw;
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+ unsigned long rate;
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+};
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+
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+#define to_hifiberry_clk(_hw) \
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+ container_of(_hw, struct clk_hifiberry_drvdata, hw)
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+
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+static int clk_hifiberry_dachd_write_pll_regs(struct regmap *regmap,
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+ struct reg_default *regs,
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+ int num, int do_pll_reset)
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+{
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+ int i;
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+ int ret = 0;
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+ char pll_soft_reset[] = { 177, 0xAC, };
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+
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+ for (i = 0; i < num; i++) {
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+ ret |= regmap_write(regmap, regs[i].reg, regs[i].def);
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+ if (ret)
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+ return ret;
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+ }
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+ if (do_pll_reset) {
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+ ret |= regmap_write(regmap, pll_soft_reset[0],
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+ pll_soft_reset[1]);
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+ mdelay(10);
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+ }
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+ return ret;
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+}
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+
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+static unsigned long clk_hifiberry_dachd_recalc_rate(struct clk_hw *hw,
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+ unsigned long parent_rate)
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+{
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+ return to_hifiberry_clk(hw)->rate;
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+}
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+
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+static long clk_hifiberry_dachd_round_rate(struct clk_hw *hw,
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+ unsigned long rate, unsigned long *parent_rate)
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+{
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+ return rate;
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+}
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+
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+static int clk_hifiberry_dachd_set_rate(struct clk_hw *hw,
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+ unsigned long rate, unsigned long parent_rate)
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+{
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+ int ret;
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+ struct clk_hifiberry_drvdata *drvdata = to_hifiberry_clk(hw);
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+
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+ switch (rate) {
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+ case 44100:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_44k1_pll_regs, num_dedicated_44k1_pll_regs,
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+ PLL_RESET);
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+ break;
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+ case 88200:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_88k2_pll_regs, num_dedicated_88k2_pll_regs,
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+ PLL_RESET);
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+ break;
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+ case 176400:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_176k4_pll_regs, num_dedicated_176k4_pll_regs,
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+ PLL_RESET);
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+ break;
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+ case 48000:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_48k_pll_regs, num_dedicated_48k_pll_regs,
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+ PLL_RESET);
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+ break;
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+ case 96000:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_96k_pll_regs, num_dedicated_96k_pll_regs,
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+ PLL_RESET);
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+ break;
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+ case 192000:
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+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap,
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+ dedicated_192k_pll_regs, num_dedicated_192k_pll_regs,
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+ PLL_RESET);
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+ break;
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+ default:
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+ ret = -EINVAL;
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+ break;
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+ }
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+ to_hifiberry_clk(hw)->rate = rate;
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+
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+ return ret;
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+}
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+
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+const struct clk_ops clk_hifiberry_dachd_rate_ops = {
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+ .recalc_rate = clk_hifiberry_dachd_recalc_rate,
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+ .round_rate = clk_hifiberry_dachd_round_rate,
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+ .set_rate = clk_hifiberry_dachd_set_rate,
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+};
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+
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+static int clk_hifiberry_get_prop_values(struct device *dev,
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+ char *prop_name,
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+ struct reg_default *regs)
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+{
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+ int ret;
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+ int i;
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+ u8 tmp[2 * HIFIBERRY_PLL_MAX_REGISTER];
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+
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+ ret = of_property_read_variable_u8_array(dev->of_node, prop_name,
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+ tmp, 0, 2 * HIFIBERRY_PLL_MAX_REGISTER);
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+ if (ret < 0)
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+ return ret;
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+ if (ret & 1) {
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+ dev_err(dev,
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+ "%s <%s> -> #%i odd number of bytes for reg/val pairs!",
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+ __func__,
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+ prop_name,
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+ ret);
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+ return -EINVAL;
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+ }
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+ ret /= 2;
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+ for (i = 0; i < ret; i++) {
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+ regs[i].reg = (u32)tmp[2 * i];
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+ regs[i].def = (u32)tmp[2 * i + 1];
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+ }
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+ return ret;
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+}
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+
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+
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+static int clk_hifiberry_dachd_dt_parse(struct device *dev)
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+{
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+ num_common_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "common_pll_regs", common_pll_regs);
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+ num_dedicated_44k1_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "44k1_pll_regs", dedicated_44k1_pll_regs);
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+ num_dedicated_88k2_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "88k2_pll_regs", dedicated_88k2_pll_regs);
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+ num_dedicated_176k4_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "176k4_pll_regs", dedicated_176k4_pll_regs);
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+ num_dedicated_48k_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "48k_pll_regs", dedicated_48k_pll_regs);
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+ num_dedicated_96k_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "96k_pll_regs", dedicated_96k_pll_regs);
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+ num_dedicated_192k_pll_regs = clk_hifiberry_get_prop_values(dev,
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+ "192k_pll_regs", dedicated_192k_pll_regs);
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+ return 0;
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+}
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+
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+
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+static int clk_hifiberry_dachd_remove(struct device *dev)
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+{
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+ of_clk_del_provider(dev->of_node);
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+ return 0;
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+}
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+
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+const struct regmap_config hifiberry_pll_regmap = {
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+ .reg_bits = 8,
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+ .val_bits = 8,
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+ .max_register = HIFIBERRY_PLL_MAX_REGISTER,
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+ .reg_defaults = hifiberry_pll_reg_defaults,
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+ .num_reg_defaults = ARRAY_SIZE(hifiberry_pll_reg_defaults),
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+ .cache_type = REGCACHE_RBTREE,
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+};
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+EXPORT_SYMBOL_GPL(hifiberry_pll_regmap);
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+
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+
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+static int clk_hifiberry_dachd_i2c_probe(struct i2c_client *i2c,
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+ const struct i2c_device_id *id)
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+{
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+ struct clk_hifiberry_drvdata *hdclk;
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+ int ret = 0;
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+ struct clk_init_data init;
|
|
+ struct device *dev = &i2c->dev;
|
|
+ struct device_node *dev_node = dev->of_node;
|
|
+ struct regmap_config config = hifiberry_pll_regmap;
|
|
+
|
|
+ hdclk = devm_kzalloc(&i2c->dev,
|
|
+ sizeof(struct clk_hifiberry_drvdata), GFP_KERNEL);
|
|
+ if (!hdclk)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ i2c_set_clientdata(i2c, hdclk);
|
|
+
|
|
+ hdclk->regmap = devm_regmap_init_i2c(i2c, &config);
|
|
+
|
|
+ if (IS_ERR(hdclk->regmap))
|
|
+ return PTR_ERR(hdclk->regmap);
|
|
+
|
|
+ /* start PLL to allow detection of DAC */
|
|
+ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap,
|
|
+ hifiberry_pll_reg_defaults,
|
|
+ ARRAY_SIZE(hifiberry_pll_reg_defaults),
|
|
+ PLL_RESET);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ clk_hifiberry_dachd_dt_parse(dev);
|
|
+
|
|
+ /* restart PLL with configs from DTB */
|
|
+ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap, common_pll_regs,
|
|
+ num_common_pll_regs, PLL_RESET);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ init.name = "clk-hifiberry-dachd";
|
|
+ init.ops = &clk_hifiberry_dachd_rate_ops;
|
|
+ init.flags = CLK_IS_BASIC;
|
|
+ init.parent_names = NULL;
|
|
+ init.num_parents = 0;
|
|
+
|
|
+ hdclk->hw.init = &init;
|
|
+
|
|
+ hdclk->clk = devm_clk_register(dev, &hdclk->hw);
|
|
+ if (IS_ERR(hdclk->clk)) {
|
|
+ dev_err(dev, "unable to register %s\n", init.name);
|
|
+ return PTR_ERR(hdclk->clk);
|
|
+ }
|
|
+
|
|
+ ret = of_clk_add_provider(dev_node, of_clk_src_simple_get, hdclk->clk);
|
|
+ if (ret != 0) {
|
|
+ dev_err(dev, "Cannot of_clk_add_provider");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
+ ret = clk_set_rate(hdclk->hw.clk, DEFAULT_RATE);
|
|
+ if (ret != 0) {
|
|
+ dev_err(dev, "Cannot set rate : %d\n", ret);
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int clk_hifiberry_dachd_i2c_remove(struct i2c_client *i2c)
|
|
+{
|
|
+ clk_hifiberry_dachd_remove(&i2c->dev);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct i2c_device_id clk_hifiberry_dachd_i2c_id[] = {
|
|
+ { "dachd-clk", },
|
|
+ { }
|
|
+};
|
|
+MODULE_DEVICE_TABLE(i2c, clk_hifiberry_dachd_i2c_id);
|
|
+
|
|
+static const struct of_device_id clk_hifiberry_dachd_of_match[] = {
|
|
+ { .compatible = "hifiberry,dachd-clk", },
|
|
+ { }
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, clk_hifiberry_dachd_of_match);
|
|
+
|
|
+static struct i2c_driver clk_hifiberry_dachd_i2c_driver = {
|
|
+ .probe = clk_hifiberry_dachd_i2c_probe,
|
|
+ .remove = clk_hifiberry_dachd_i2c_remove,
|
|
+ .id_table = clk_hifiberry_dachd_i2c_id,
|
|
+ .driver = {
|
|
+ .name = "dachd-clk",
|
|
+ .of_match_table = of_match_ptr(clk_hifiberry_dachd_of_match),
|
|
+ },
|
|
+};
|
|
+
|
|
+module_i2c_driver(clk_hifiberry_dachd_i2c_driver);
|
|
+
|
|
+
|
|
+MODULE_DESCRIPTION("HiFiBerry DAC+ HD clock driver");
|
|
+MODULE_AUTHOR("Joerg Schambacher <joerg@i2audio.com>");
|
|
+MODULE_LICENSE("GPL v2");
|
|
+MODULE_ALIAS("platform:clk-hifiberry-dachd");
|
|
--- a/sound/soc/bcm/Kconfig
|
|
+++ b/sound/soc/bcm/Kconfig
|
|
@@ -40,6 +40,13 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS
|
|
help
|
|
Say Y or M if you want to add support for HifiBerry DAC+.
|
|
|
|
+config SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD
|
|
+ tristate "Support for HifiBerry DAC+ HD"
|
|
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
|
|
+ select SND_SOC_PCM179X_I2C
|
|
+ help
|
|
+ Say Y or M if you want to add support for HifiBerry DAC+ HD.
|
|
+
|
|
config SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC
|
|
tristate "Support for HifiBerry DAC+ADC"
|
|
depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
|
|
--- a/sound/soc/bcm/Makefile
|
|
+++ b/sound/soc/bcm/Makefile
|
|
@@ -13,6 +13,7 @@ snd-soc-googlevoicehat-codec-objs := goo
|
|
|
|
# BCM2708 Machine Support
|
|
snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
|
|
+snd-soc-hifiberry-dacplushd-objs := hifiberry_dacplushd.o
|
|
snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o
|
|
snd-soc-hifiberry-dacplusadcpro-objs := hifiberry_dacplusadcpro.o
|
|
snd-soc-hifiberry-dacplusdsp-objs := hifiberry_dacplusdsp.o
|
|
@@ -40,6 +41,7 @@ snd-soc-rpi-wm8804-soundcard-objs := rpi
|
|
|
|
obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o
|
|
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
|
|
+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD) += snd-soc-hifiberry-dacplushd.o
|
|
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o
|
|
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADCPRO) += snd-soc-hifiberry-dacplusadcpro.o
|
|
obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSDSP) += snd-soc-hifiberry-dacplusdsp.o
|
|
--- /dev/null
|
|
+++ b/sound/soc/bcm/hifiberry_dacplushd.c
|
|
@@ -0,0 +1,235 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+/*
|
|
+ * ASoC Driver for HiFiBerry DAC+ HD
|
|
+ *
|
|
+ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry
|
|
+ * Copyright 2020
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License
|
|
+ * version 2 as published by the Free Software Foundation.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful, but
|
|
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
+ * General Public License for more details.
|
|
+ */
|
|
+
|
|
+#include <linux/module.h>
|
|
+#include <linux/platform_device.h>
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/delay.h>
|
|
+#include <linux/module.h>
|
|
+#include <linux/of.h>
|
|
+#include <linux/delay.h>
|
|
+#include <linux/gpio.h>
|
|
+#include <linux/gpio/consumer.h>
|
|
+#include <sound/core.h>
|
|
+#include <sound/pcm.h>
|
|
+#include <sound/pcm_params.h>
|
|
+#include <sound/soc.h>
|
|
+#include <linux/i2c.h>
|
|
+#include <linux/clk.h>
|
|
+
|
|
+#include "../codecs/pcm179x.h"
|
|
+
|
|
+#define DEFAULT_RATE 44100
|
|
+
|
|
+struct brd_drv_data {
|
|
+ struct regmap *regmap;
|
|
+ struct clk *sclk;
|
|
+};
|
|
+
|
|
+static struct brd_drv_data drvdata;
|
|
+static struct gpio_desc *reset_gpio;
|
|
+static const unsigned int hb_dacplushd_rates[] = {
|
|
+ 192000, 96000, 48000, 176400, 88200, 44100,
|
|
+};
|
|
+
|
|
+static struct snd_pcm_hw_constraint_list hb_dacplushd_constraints = {
|
|
+ .list = hb_dacplushd_rates,
|
|
+ .count = ARRAY_SIZE(hb_dacplushd_rates),
|
|
+};
|
|
+
|
|
+static int snd_rpi_hb_dacplushd_startup(struct snd_pcm_substream *substream)
|
|
+{
|
|
+ /* constraints for standard sample rates */
|
|
+ snd_pcm_hw_constraint_list(substream->runtime, 0,
|
|
+ SNDRV_PCM_HW_PARAM_RATE,
|
|
+ &hb_dacplushd_constraints);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void snd_rpi_hifiberry_dacplushd_set_sclk(
|
|
+ struct snd_soc_component *component,
|
|
+ int sample_rate)
|
|
+{
|
|
+ if (!IS_ERR(drvdata.sclk))
|
|
+ clk_set_rate(drvdata.sclk, sample_rate);
|
|
+}
|
|
+
|
|
+static int snd_rpi_hifiberry_dacplushd_init(struct snd_soc_pcm_runtime *rtd)
|
|
+{
|
|
+ struct snd_soc_dai_link *dai = rtd->dai_link;
|
|
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
|
|
+
|
|
+ dai->name = "HiFiBerry DAC+ HD";
|
|
+ dai->stream_name = "HiFiBerry DAC+ HD HiFi";
|
|
+ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
|
|
+ | SND_SOC_DAIFMT_CBM_CFM;
|
|
+
|
|
+ /* allow only fixed 32 clock counts per channel */
|
|
+ snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int snd_rpi_hifiberry_dacplushd_hw_params(
|
|
+ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
|
|
+{
|
|
+ int ret = 0;
|
|
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
+
|
|
+ struct snd_soc_component *component = rtd->codec_dai->component;
|
|
+
|
|
+ snd_rpi_hifiberry_dacplushd_set_sclk(component, params_rate(params));
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+/* machine stream operations */
|
|
+static struct snd_soc_ops snd_rpi_hifiberry_dacplushd_ops = {
|
|
+ .startup = snd_rpi_hb_dacplushd_startup,
|
|
+ .hw_params = snd_rpi_hifiberry_dacplushd_hw_params,
|
|
+};
|
|
+
|
|
+static struct snd_soc_dai_link snd_rpi_hifiberry_dacplushd_dai[] = {
|
|
+{
|
|
+ .name = "HiFiBerry DAC+ HD",
|
|
+ .stream_name = "HiFiBerry DAC+ HD HiFi",
|
|
+ .cpu_dai_name = "bcm2708-i2s.0",
|
|
+ .codec_dai_name = "pcm179x-hifi",
|
|
+ .platform_name = "bcm2708-i2s.0",
|
|
+ .codec_name = "pcm179x.1-004c",
|
|
+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
|
|
+ SND_SOC_DAIFMT_CBS_CFS,
|
|
+ .ops = &snd_rpi_hifiberry_dacplushd_ops,
|
|
+ .init = snd_rpi_hifiberry_dacplushd_init,
|
|
+},
|
|
+};
|
|
+
|
|
+/* audio machine driver */
|
|
+static struct snd_soc_card snd_rpi_hifiberry_dacplushd = {
|
|
+ .name = "snd_rpi_hifiberry_dacplushd",
|
|
+ .driver_name = "HifiberryDacplusHD",
|
|
+ .owner = THIS_MODULE,
|
|
+ .dai_link = snd_rpi_hifiberry_dacplushd_dai,
|
|
+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_dacplushd_dai),
|
|
+};
|
|
+
|
|
+static int snd_rpi_hifiberry_dacplushd_probe(struct platform_device *pdev)
|
|
+{
|
|
+ int ret = 0;
|
|
+ static int dac_reset_done;
|
|
+ struct device *dev = &pdev->dev;
|
|
+ struct device_node *dev_node = dev->of_node;
|
|
+
|
|
+ snd_rpi_hifiberry_dacplushd.dev = &pdev->dev;
|
|
+
|
|
+ /* get GPIO and release DAC from RESET */
|
|
+ if (!dac_reset_done) {
|
|
+ reset_gpio = gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
|
|
+ if (IS_ERR(reset_gpio)) {
|
|
+ dev_err(&pdev->dev, "gpiod_get() failed\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+ dac_reset_done = 1;
|
|
+ }
|
|
+ if (!IS_ERR(reset_gpio))
|
|
+ gpiod_set_value(reset_gpio, 0);
|
|
+ msleep(1);
|
|
+ if (!IS_ERR(reset_gpio))
|
|
+ gpiod_set_value(reset_gpio, 1);
|
|
+ msleep(1);
|
|
+ if (!IS_ERR(reset_gpio))
|
|
+ gpiod_set_value(reset_gpio, 0);
|
|
+
|
|
+ if (pdev->dev.of_node) {
|
|
+ struct device_node *i2s_node;
|
|
+ struct snd_soc_dai_link *dai;
|
|
+
|
|
+ dai = &snd_rpi_hifiberry_dacplushd_dai[0];
|
|
+ i2s_node = of_parse_phandle(pdev->dev.of_node,
|
|
+ "i2s-controller", 0);
|
|
+
|
|
+ if (i2s_node) {
|
|
+ dai->cpu_dai_name = NULL;
|
|
+ dai->cpu_of_node = i2s_node;
|
|
+ dai->platform_name = NULL;
|
|
+ dai->platform_of_node = i2s_node;
|
|
+ } else {
|
|
+ return -EPROBE_DEFER;
|
|
+ }
|
|
+
|
|
+ }
|
|
+
|
|
+ ret = devm_snd_soc_register_card(&pdev->dev,
|
|
+ &snd_rpi_hifiberry_dacplushd);
|
|
+ if (ret && ret != -EPROBE_DEFER) {
|
|
+ dev_err(&pdev->dev,
|
|
+ "snd_soc_register_card() failed: %d\n", ret);
|
|
+ return ret;
|
|
+ }
|
|
+ if (ret == -EPROBE_DEFER)
|
|
+ return ret;
|
|
+
|
|
+ dev_set_drvdata(dev, &drvdata);
|
|
+ if (dev_node == NULL) {
|
|
+ dev_err(&pdev->dev, "Device tree node not found\n");
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ drvdata.sclk = devm_clk_get(dev, NULL);
|
|
+ if (IS_ERR(drvdata.sclk)) {
|
|
+ drvdata.sclk = ERR_PTR(-ENOENT);
|
|
+ return -ENODEV;
|
|
+ }
|
|
+
|
|
+ clk_set_rate(drvdata.sclk, DEFAULT_RATE);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int snd_rpi_hifiberry_dacplushd_remove(struct platform_device *pdev)
|
|
+{
|
|
+ if (IS_ERR(reset_gpio))
|
|
+ return -EINVAL;
|
|
+
|
|
+ /* put DAC into RESET and release GPIO */
|
|
+ gpiod_set_value(reset_gpio, 0);
|
|
+ gpiod_put(reset_gpio);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id snd_rpi_hifiberry_dacplushd_of_match[] = {
|
|
+ { .compatible = "hifiberry,hifiberry-dacplushd", },
|
|
+ {},
|
|
+};
|
|
+
|
|
+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_dacplushd_of_match);
|
|
+
|
|
+static struct platform_driver snd_rpi_hifiberry_dacplushd_driver = {
|
|
+ .driver = {
|
|
+ .name = "snd-rpi-hifiberry-dacplushd",
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = snd_rpi_hifiberry_dacplushd_of_match,
|
|
+ },
|
|
+ .probe = snd_rpi_hifiberry_dacplushd_probe,
|
|
+ .remove = snd_rpi_hifiberry_dacplushd_remove,
|
|
+};
|
|
+
|
|
+module_platform_driver(snd_rpi_hifiberry_dacplushd_driver);
|
|
+
|
|
+MODULE_AUTHOR("Joerg Schambacher <joerg@i2audio.com>");
|
|
+MODULE_DESCRIPTION("ASoC Driver for HiFiBerry DAC+ HD");
|
|
+MODULE_LICENSE("GPL v2");
|