mirror of https://github.com/hak5/openwrt.git
55 lines
1.8 KiB
Diff
55 lines
1.8 KiB
Diff
From afb2cfe3056fc643cee8ae25991f4b9c22d48bef Mon Sep 17 00:00:00 2001
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From: popcornmix <popcornmix@gmail.com>
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Date: Thu, 7 Nov 2019 14:23:38 +0000
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Subject: [PATCH] fixup! clk-raspberrypi: Also support v3d clock
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---
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drivers/clk/bcm/clk-raspberrypi.c | 10 +++++++---
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1 file changed, 7 insertions(+), 3 deletions(-)
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--- a/drivers/clk/bcm/clk-raspberrypi.c
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+++ b/drivers/clk/bcm/clk-raspberrypi.c
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@@ -208,6 +208,9 @@ static int raspberrypi_determine_rate(st
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u32 clock_id, const char *name, unsigned long min_rate, unsigned long max_rate,
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struct clk_rate_request *req)
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{
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+#if 1
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+ req->rate = clamp(req->rate, min_rate, max_rate);
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+#else
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u64 div, final_rate;
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u32 ndiv, fdiv;
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@@ -225,6 +228,7 @@ static int raspberrypi_determine_rate(st
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req->rate = final_rate >> A2W_PLL_FRAC_BITS;
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+#endif
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return 0;
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}
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@@ -351,21 +355,21 @@ static const struct clk_ops raspberrypi_
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.is_prepared = raspberrypi_fw_pll_is_on,
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.recalc_rate = raspberrypi_fw_pll_get_rate,
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.set_rate = raspberrypi_fw_pll_set_rate,
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- //.determine_rate = raspberrypi_pll_determine_rate,
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+ .determine_rate = raspberrypi_pll_determine_rate,
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};
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static const struct clk_ops raspberrypi_firmware_pll_divider_clk_ops = {
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.is_prepared = raspberrypi_fw_pll_div_is_on,
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.recalc_rate = raspberrypi_fw_pll_div_get_rate,
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.set_rate = raspberrypi_fw_pll_div_set_rate,
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- //.determine_rate = raspberrypi_pll_div_determine_rate,
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+ .determine_rate = raspberrypi_pll_div_determine_rate,
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};
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static const struct clk_ops raspberrypi_firmware_clk_ops = {
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.is_prepared = raspberrypi_fw_clock_is_on,
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.recalc_rate = raspberrypi_fw_clock_get_rate,
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.set_rate = raspberrypi_fw_clock_set_rate,
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- //.determine_rate = raspberrypi_clock_determine_rate,
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+ .determine_rate = raspberrypi_clock_determine_rate,
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};
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