mirror of https://github.com/hak5/openwrt.git
460 lines
8.5 KiB
Diff
460 lines
8.5 KiB
Diff
From a9d2b105ccd23e07e3dd99d010a34bd5d1c95b42 Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Sat, 13 Jan 2018 18:35:59 +0100
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Subject: [PATCH 1/3] ARM: dts: rename oxnas dts files
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Other platforms' device-tree files start with a platform prefix, such as
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sun7i-a20-*.dts or at91-*.dts.
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This naming scheme turns out to be handy when using multi-platform build
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systems such as OpenWrt.
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Prepend oxnas files with their platform prefix to comply with the naming
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scheme already used for most other platforms.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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---
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arch/arm/boot/dts/Makefile | 4 ++--
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arch/arm/boot/dts/{wd-mbwe.dts => ox810se-wd-mbwe.dts} | 0
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...-series-3.dts => ox820-cloudengines-pogoplug-series-3.dts} | 0
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3 files changed, 2 insertions(+), 2 deletions(-)
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rename arch/arm/boot/dts/{wd-mbwe.dts => ox810se-wd-mbwe.dts} (100%)
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rename arch/arm/boot/dts/{cloudengines-pogoplug-series-3.dts => ox820-cloudengines-pogoplug-series-3.dts} (100%)
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -685,8 +685,8 @@ dtb-$(CONFIG_ARCH_ACTIONS) += \
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dtb-$(CONFIG_ARCH_PRIMA2) += \
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prima2-evb.dtb
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dtb-$(CONFIG_ARCH_OXNAS) += \
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- wd-mbwe.dtb \
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- cloudengines-pogoplug-series-3.dtb
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+ ox810se-wd-mbwe.dtb \
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+ ox820-cloudengines-pogoplug-series-3.dtb
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dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-apq8060-dragonboard.dtb \
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qcom-apq8064-arrow-sd-600eval.dtb \
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--- a/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts
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+++ /dev/null
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@@ -1,94 +0,0 @@
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-/*
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- * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
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- *
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- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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- *
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- * Licensed under GPLv2 or later
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- */
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-
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-/dts-v1/;
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-#include "ox820.dtsi"
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-
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-/ {
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- model = "Cloud Engines PogoPlug Series 3";
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-
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- compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
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-
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- chosen {
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- bootargs = "earlyprintk";
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- stdout-path = "serial0:115200n8";
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- };
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-
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- memory {
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- /* 128Mbytes DDR */
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- reg = <0x60000000 0x8000000>;
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- };
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-
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- aliases {
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- serial0 = &uart0;
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- gpio0 = &gpio0;
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- gpio1 = &gpio1;
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- };
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-
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- leds {
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- compatible = "gpio-leds";
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-
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- blue {
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- label = "pogoplug:blue";
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- gpios = <&gpio0 2 0>;
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- default-state = "keep";
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- };
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-
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- orange {
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- label = "pogoplug:orange";
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- gpios = <&gpio1 16 1>;
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- default-state = "keep";
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- };
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-
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- green {
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- label = "pogoplug:green";
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- gpios = <&gpio1 17 1>;
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- default-state = "keep";
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- };
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- };
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-};
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-
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-&uart0 {
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- status = "okay";
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-
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_uart0>;
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-};
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-
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-&nandc {
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- status = "okay";
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-
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_nand>;
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-
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- nand@0 {
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- reg = <0>;
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- #address-cells = <1>;
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- #size-cells = <1>;
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- nand-ecc-mode = "soft";
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- nand-ecc-algo = "hamming";
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-
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- partition@0 {
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- label = "boot";
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- reg = <0x00000000 0x00e00000>;
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- read-only;
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- };
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-
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- partition@e00000 {
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- label = "ubi";
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- reg = <0x00e00000 0x07200000>;
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- };
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- };
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-};
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-
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-ða {
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- status = "okay";
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-
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_etha_mdio>;
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-};
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--- /dev/null
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+++ b/arch/arm/boot/dts/ox810se-wd-mbwe.dts
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@@ -0,0 +1,112 @@
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+/*
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+ * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
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+ *
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+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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+ *
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+ * Licensed under GPLv2 or later
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+ */
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+
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+/dts-v1/;
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+#include "ox810se.dtsi"
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+
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+/ {
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+ model = "Western Digital My Book World Edition";
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+
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+ compatible = "wd,mbwe", "oxsemi,ox810se";
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+
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+ chosen {
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+ bootargs = "console=ttyS1,115200n8 earlyprintk=serial";
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+ };
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+
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+ memory {
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+ /* 128Mbytes DDR */
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+ reg = <0x48000000 0x8000000>;
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+ };
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+
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+ aliases {
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+ serial1 = &uart1;
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+ gpio0 = &gpio0;
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+ gpio1 = &gpio1;
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+ };
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+
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+ gpio-keys-polled {
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+ compatible = "gpio-keys-polled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ poll-interval = <100>;
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+
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+ power {
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+ label = "power";
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+ gpios = <&gpio0 0 1>;
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+ linux,code = <0x198>;
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+ };
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+
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+ recovery {
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+ label = "recovery";
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+ gpios = <&gpio0 4 1>;
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+ linux,code = <0xab>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ a0 {
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+ label = "activity0";
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+ gpios = <&gpio0 25 0>;
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+ default-state = "keep";
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+ };
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+
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+ a1 {
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+ label = "activity1";
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+ gpios = <&gpio0 26 0>;
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+ default-state = "keep";
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+ };
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+
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+ a2 {
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+ label = "activity2";
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+ gpios = <&gpio0 5 0>;
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+ default-state = "keep";
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+ };
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+
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+ a3 {
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+ label = "activity3";
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+ gpios = <&gpio0 6 0>;
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+ default-state = "keep";
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+ };
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+
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+ a4 {
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+ label = "activity4";
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+ gpios = <&gpio0 7 0>;
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+ default-state = "keep";
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+ };
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+
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+ a5 {
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+ label = "activity5";
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+ gpios = <&gpio1 2 0>;
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+ default-state = "keep";
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+ };
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+ };
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+
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+ i2c-gpio {
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+ compatible = "i2c-gpio";
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+ gpios = <&gpio0 3 0 /* sda */
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+ &gpio0 2 0 /* scl */
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+ >;
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+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtc0: rtc@48 {
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+ compatible = "st,m41t00";
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+ reg = <0x68>;
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+ };
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+ };
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+};
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+
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+&uart1 {
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+ status = "okay";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart1>;
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
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@@ -0,0 +1,94 @@
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+/*
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+ * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
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+ *
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+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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+ *
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+ * Licensed under GPLv2 or later
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+ */
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+
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+/dts-v1/;
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+#include "ox820.dtsi"
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+
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+/ {
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+ model = "Cloud Engines PogoPlug Series 3";
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+
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+ compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
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+
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+ chosen {
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+ bootargs = "earlyprintk";
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory {
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+ /* 128Mbytes DDR */
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+ reg = <0x60000000 0x8000000>;
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+ };
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+
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+ aliases {
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+ serial0 = &uart0;
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+ gpio0 = &gpio0;
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+ gpio1 = &gpio1;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ blue {
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+ label = "pogoplug:blue";
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+ gpios = <&gpio0 2 0>;
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+ default-state = "keep";
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+ };
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+
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+ orange {
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+ label = "pogoplug:orange";
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+ gpios = <&gpio1 16 1>;
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+ default-state = "keep";
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+ };
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+
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+ green {
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+ label = "pogoplug:green";
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+ gpios = <&gpio1 17 1>;
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+ default-state = "keep";
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+ };
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+ };
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+};
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+
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+&uart0 {
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+ status = "okay";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart0>;
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+};
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+
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+&nandc {
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+ status = "okay";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_nand>;
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+
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+ nand@0 {
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ nand-ecc-mode = "soft";
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+ nand-ecc-algo = "hamming";
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+
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+ partition@0 {
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+ label = "boot";
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+ reg = <0x00000000 0x00e00000>;
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+ read-only;
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+ };
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+
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+ partition@e00000 {
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+ label = "ubi";
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+ reg = <0x00e00000 0x07200000>;
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+ };
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+ };
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+};
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+
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+ða {
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+ status = "okay";
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_etha_mdio>;
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+};
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--- a/arch/arm/boot/dts/wd-mbwe.dts
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+++ /dev/null
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@@ -1,112 +0,0 @@
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-/*
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- * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
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- *
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- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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- *
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- * Licensed under GPLv2 or later
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- */
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-
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-/dts-v1/;
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-#include "ox810se.dtsi"
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-
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-/ {
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- model = "Western Digital My Book World Edition";
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-
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- compatible = "wd,mbwe", "oxsemi,ox810se";
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-
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- chosen {
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- bootargs = "console=ttyS1,115200n8 earlyprintk=serial";
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- };
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-
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- memory {
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- /* 128Mbytes DDR */
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- reg = <0x48000000 0x8000000>;
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- };
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-
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- aliases {
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- serial1 = &uart1;
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- gpio0 = &gpio0;
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- gpio1 = &gpio1;
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- };
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-
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- gpio-keys-polled {
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- compatible = "gpio-keys-polled";
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- #address-cells = <1>;
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- #size-cells = <0>;
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- poll-interval = <100>;
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-
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- power {
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- label = "power";
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- gpios = <&gpio0 0 1>;
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- linux,code = <0x198>;
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- };
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-
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- recovery {
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- label = "recovery";
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- gpios = <&gpio0 4 1>;
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- linux,code = <0xab>;
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- };
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- };
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-
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- leds {
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- compatible = "gpio-leds";
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-
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- a0 {
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- label = "activity0";
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- gpios = <&gpio0 25 0>;
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- default-state = "keep";
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- };
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-
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- a1 {
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- label = "activity1";
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- gpios = <&gpio0 26 0>;
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- default-state = "keep";
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- };
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-
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- a2 {
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- label = "activity2";
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- gpios = <&gpio0 5 0>;
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- default-state = "keep";
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- };
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-
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- a3 {
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- label = "activity3";
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- gpios = <&gpio0 6 0>;
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- default-state = "keep";
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- };
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-
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- a4 {
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- label = "activity4";
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- gpios = <&gpio0 7 0>;
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- default-state = "keep";
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- };
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-
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- a5 {
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- label = "activity5";
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- gpios = <&gpio1 2 0>;
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- default-state = "keep";
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- };
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- };
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-
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- i2c-gpio {
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- compatible = "i2c-gpio";
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- gpios = <&gpio0 3 0 /* sda */
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- &gpio0 2 0 /* scl */
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- >;
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- i2c-gpio,delay-us = <2>; /* ~100 kHz */
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- #address-cells = <1>;
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- #size-cells = <0>;
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-
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- rtc0: rtc@48 {
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- compatible = "st,m41t00";
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- reg = <0x68>;
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- };
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- };
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-};
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-
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-&uart1 {
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- status = "okay";
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-
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- pinctrl-names = "default";
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- pinctrl-0 = <&pinctrl_uart1>;
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-};
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