mirror of https://github.com/hak5/openwrt.git
99 lines
2.9 KiB
Diff
99 lines
2.9 KiB
Diff
From 0f84c305351c993e4307e1e8c128d44760314e31 Mon Sep 17 00:00:00 2001
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From: Andrew Bresticker <abrestic@chromium.org>
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Date: Thu, 18 Sep 2014 14:47:07 -0700
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Subject: [PATCH 1/3] MIPS: Always use IRQ domains for CPU IRQs
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Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.
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Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
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Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
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Tested-by: Qais Yousef <qais.yousef@imgtec.com>
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Cc: Thomas Gleixner <tglx@linutronix.de>
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Cc: Jason Cooper <jason@lakedaemon.net>
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Cc: Andrew Bresticker <abrestic@chromium.org>
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Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
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Cc: Markos Chandras <markos.chandras@imgtec.com>
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Cc: Paul Burton <paul.burton@imgtec.com>
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Cc: Qais Yousef <qais.yousef@imgtec.com>
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Cc: Jonas Gorski <jogo@openwrt.org>
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Cc: John Crispin <blogic@openwrt.org>
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Cc: David Daney <ddaney.cavm@gmail.com>
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Cc: linux-mips@linux-mips.org
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Cc: linux-kernel@vger.kernel.org
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Patchwork: https://patchwork.linux-mips.org/patch/7799/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/Kconfig | 1 +
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arch/mips/kernel/irq_cpu.c | 36 +++++++++++-------------------------
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2 files changed, 12 insertions(+), 25 deletions(-)
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -1056,6 +1056,7 @@ config MIPS_HUGE_TLB_SUPPORT
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config IRQ_CPU
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bool
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+ select IRQ_DOMAIN
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config IRQ_CPU_RM7K
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bool
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--- a/arch/mips/kernel/irq_cpu.c
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+++ b/arch/mips/kernel/irq_cpu.c
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@@ -98,28 +98,6 @@ static struct irq_chip mips_mt_cpu_irq_c
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.irq_enable = unmask_mips_irq,
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};
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-void __init mips_cpu_irq_init(void)
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-{
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- int irq_base = MIPS_CPU_IRQ_BASE;
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- int i;
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-
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- /* Mask interrupts. */
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- clear_c0_status(ST0_IM);
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- clear_c0_cause(CAUSEF_IP);
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-
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- /* Software interrupts are used for MT/CMT IPI */
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- for (i = irq_base; i < irq_base + 2; i++)
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- irq_set_chip_and_handler(i, cpu_has_mipsmt ?
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- &mips_mt_cpu_irq_controller :
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- &mips_cpu_irq_controller,
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- handle_percpu_irq);
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-
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- for (i = irq_base + 2; i < irq_base + 8; i++)
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- irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
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- handle_percpu_irq);
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-}
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-
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-#ifdef CONFIG_IRQ_DOMAIN
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static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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@@ -142,8 +120,7 @@ static const struct irq_domain_ops mips_
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.xlate = irq_domain_xlate_onecell,
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};
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-int __init mips_cpu_intc_init(struct device_node *of_node,
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- struct device_node *parent)
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+static void __init __mips_cpu_irq_init(struct device_node *of_node)
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{
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struct irq_domain *domain;
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@@ -155,7 +132,16 @@ int __init mips_cpu_intc_init(struct dev
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&mips_cpu_intc_irq_domain_ops, NULL);
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if (!domain)
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panic("Failed to add irqdomain for MIPS CPU");
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+}
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+void __init mips_cpu_irq_init(void)
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+{
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+ __mips_cpu_irq_init(NULL);
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+}
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+
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+int __init mips_cpu_intc_init(struct device_node *of_node,
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+ struct device_node *parent)
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+{
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+ __mips_cpu_irq_init(of_node);
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return 0;
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}
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-#endif /* CONFIG_IRQ_DOMAIN */
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