mirror of https://github.com/hak5/openwrt.git
184 lines
5.5 KiB
Diff
184 lines
5.5 KiB
Diff
From 7cd84b455f4681e4db6cd9e3cd628bcd06df0978 Mon Sep 17 00:00:00 2001
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From: Martin Sperl <kernel@martin.sperl.org>
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Date: Wed, 16 Mar 2016 12:25:01 -0700
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Subject: [PATCH 399/423] dmaengine: bcm2835: add slave_sg support to
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bcm2835-dma
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Add slave_sg support to bcm2835-dma using shared allocation
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code for bcm2835_desc and DMA-control blocks already used by
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dma_cyclic.
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Note that bcm2835_dma_callback had to get modified to support
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both modes of operation (cyclic and non-cyclic).
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Tested using:
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* Hifiberry I2S card (using cyclic DMA)
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* fb_st7735r SPI-framebuffer (using slave_sg DMA via spi-bcm2835)
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playing BigBuckBunny for audio and video.
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Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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---
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drivers/dma/bcm2835-dma.c | 113 ++++++++++++++++++++++++++++++++++++++++++++--
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1 file changed, 108 insertions(+), 5 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -260,6 +260,23 @@ static void bcm2835_dma_create_cb_set_le
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control_block->info |= finalextrainfo;
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}
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+static inline size_t bcm2835_dma_count_frames_for_sg(
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+ struct bcm2835_chan *c,
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+ struct scatterlist *sgl,
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+ unsigned int sg_len)
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+{
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+ size_t frames = 0;
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+ struct scatterlist *sgent;
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+ unsigned int i;
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+ size_t plength = bcm2835_dma_max_frame_length(c);
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+
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+ for_each_sg(sgl, sgent, sg_len, i)
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+ frames += bcm2835_dma_frames_for_length(
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+ sg_dma_len(sgent), plength);
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+
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+ return frames;
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+}
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+
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/**
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* bcm2835_dma_create_cb_chain - create a control block and fills data in
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*
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@@ -361,6 +378,32 @@ error_cb:
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return NULL;
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}
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+static void bcm2835_dma_fill_cb_chain_with_sg(
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+ struct dma_chan *chan,
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+ enum dma_transfer_direction direction,
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+ struct bcm2835_cb_entry *cb,
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+ struct scatterlist *sgl,
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+ unsigned int sg_len)
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+{
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+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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+ size_t max_len = bcm2835_dma_max_frame_length(c);
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+ unsigned int i, len;
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+ dma_addr_t addr;
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+ struct scatterlist *sgent;
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+
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+ for_each_sg(sgl, sgent, sg_len, i) {
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+ for (addr = sg_dma_address(sgent), len = sg_dma_len(sgent);
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+ len > 0;
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+ addr += cb->cb->length, len -= cb->cb->length, cb++) {
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+ if (direction == DMA_DEV_TO_MEM)
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+ cb->cb->dst = addr;
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+ else
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+ cb->cb->src = addr;
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+ cb->cb->length = min(len, max_len);
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+ }
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+ }
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+}
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+
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static int bcm2835_dma_abort(void __iomem *chan_base)
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{
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unsigned long cs;
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@@ -428,13 +471,19 @@ static irqreturn_t bcm2835_dma_callback(
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d = c->desc;
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if (d) {
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- /* TODO Only works for cyclic DMA */
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- vchan_cyclic_callback(&d->vd);
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+ if (d->cyclic) {
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+ /* call the cyclic callback */
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+ vchan_cyclic_callback(&d->vd);
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+
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+ /* Keep the DMA engine running */
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+ writel(BCM2835_DMA_ACTIVE,
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+ c->chan_base + BCM2835_DMA_CS);
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+ } else {
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+ vchan_cookie_complete(&c->desc->vd);
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+ bcm2835_dma_start_desc(c);
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+ }
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}
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- /* Keep the DMA engine running */
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- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
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-
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spin_unlock_irqrestore(&c->vc.lock, flags);
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return IRQ_HANDLED;
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@@ -548,6 +597,58 @@ static void bcm2835_dma_issue_pending(st
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spin_unlock_irqrestore(&c->vc.lock, flags);
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}
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+static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
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+ struct dma_chan *chan,
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+ struct scatterlist *sgl, unsigned int sg_len,
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+ enum dma_transfer_direction direction,
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+ unsigned long flags, void *context)
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+{
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+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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+ struct bcm2835_desc *d;
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+ dma_addr_t src = 0, dst = 0;
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+ u32 info = BCM2835_DMA_WAIT_RESP;
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+ u32 extra = BCM2835_DMA_INT_EN;
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+ size_t frames;
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+
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+ if (!is_slave_direction(direction)) {
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+ dev_err(chan->device->dev,
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+ "%s: bad direction?\n", __func__);
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+ return NULL;
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+ }
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+
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+ if (c->dreq != 0)
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+ info |= BCM2835_DMA_PER_MAP(c->dreq);
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+
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+ if (direction == DMA_DEV_TO_MEM) {
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+ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
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+ return NULL;
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+ src = c->cfg.src_addr;
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+ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
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+ } else {
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+ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
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+ return NULL;
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+ dst = c->cfg.dst_addr;
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+ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
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+ }
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+
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+ /* count frames in sg list */
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+ frames = bcm2835_dma_count_frames_for_sg(c, sgl, sg_len);
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+
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+ /* allocate the CB chain */
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+ d = bcm2835_dma_create_cb_chain(chan, direction, false,
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+ info, extra,
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+ frames, src, dst, 0, 0,
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+ GFP_KERNEL);
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+ if (!d)
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+ return NULL;
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+
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+ /* fill in frames with scatterlist pointers */
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+ bcm2835_dma_fill_cb_chain_with_sg(chan, direction, d->cb_list,
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+ sgl, sg_len);
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+
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+ return vchan_tx_prep(&c->vc, &d->vd, flags);
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+}
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+
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static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
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struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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size_t period_len, enum dma_transfer_direction direction,
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@@ -778,11 +879,13 @@ static int bcm2835_dma_probe(struct plat
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dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
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dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
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dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
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+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
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od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
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od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
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od->ddev.device_tx_status = bcm2835_dma_tx_status;
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od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
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od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
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+ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
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od->ddev.device_config = bcm2835_dma_slave_config;
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od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
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od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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