mirror of https://github.com/hak5/openwrt.git
169 lines
6.0 KiB
Diff
169 lines
6.0 KiB
Diff
--- /dev/null
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+++ b/include/asm-arm/arch-pxa/gumstix.h
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@@ -0,0 +1,165 @@
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+/*
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+ * linux/include/asm-arm/arch-pxa/gumstix.h
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+
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+/* BTRESET - Reset line to Bluetooth module, active low signal. */
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+#define GPIO_GUMSTIX_BTRESET 7
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+#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
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+
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+
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+/* GPIOn - Input from MAX823 (or equiv), normalizing USB +5V
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+ into a clean interrupt signal for determining cable presence
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+ On the original gumstix, this is GPIO81, and GPIO83 needs to be defined as well.
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+ On the gumstix F, this moves to GPIO17 and GPIO37 */
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+/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
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+ has detected a cable insertion; driven low otherwise. */
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+
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+#ifdef CONFIG_ARCH_GUMSTIX_ORIG
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+
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+#define GPIO_GUMSTIX_USB_GPIOn 81
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+#define GPIO_GUMSTIX_USB_GPIOx 83
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+
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+#else
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+
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+#define GPIO_GUMSTIX_USB_GPIOn 35
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+#define GPIO_GUMSTIX_USB_GPIOx 41
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+
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+#endif
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+
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+#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) /* usb state change */
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+#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
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+#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
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+#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
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+
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+
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+/*
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+ * SMC Ethernet definitions
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+ * ETH_RST provides a hardware reset line to the ethernet chip
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+ * ETH is the IRQ line in from the ethernet chip to the PXA
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+ */
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+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_ETH0_RST 80
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+#define GPIO_GUMSTIX_ETH0 36
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+#else
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+#define GPIO_GUMSTIX_ETH0_RST 32
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+#define GPIO_GUMSTIX_ETH0 99
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+#endif
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+#define GPIO_GUMSTIX_ETH1_RST 52
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+#define GPIO_GUMSTIX_ETH1 27
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+
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+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
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+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
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+#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
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+#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
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+
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+#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
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+#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
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+
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+
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+/* CF reset line */
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+#define GPIO8_CF_RESET 8
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+#define GPIO97_CF_RESET 97
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+#define GPIO110_CF_RESET 110
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+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
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+#else
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+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
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+#endif
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+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
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+
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+
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+/* CF signals shared by both sockets */
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+#define GPIO_GUMSTIX_nPOE GPIO48_nPOE
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+#define GPIO_GUMSTIX_nPWE GPIO49_nPWE
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+#define GPIO_GUMSTIX_nPIOR GPIO50_nPIOR
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+#define GPIO_GUMSTIX_nPIOW GPIO51_nPIOW
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+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nPCE_1 GPIO52_nPCE_1
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+#define GPIO_GUMSTIX_nPCE_2 GPIO53_nPCE_2
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+#define GPIO_GUMSTIX_pSKTSEL GPIO54_pSKTSEL
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+#else
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+#define GPIO_GUMSTIX_nPCE_1 GPIO102_nPCE_1
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+#define GPIO_GUMSTIX_nPCE_2 GPIO105_nPCE_2
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+#define GPIO_GUMSTIX_pSKTSEL GPIO79_pSKTSEL
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+#endif
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+#define GPIO_GUMSTIX_nPREG GPIO55_nPREG
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+#define GPIO_GUMSTIX_nPWAIT GPIO56_nPWAIT
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+#define GPIO_GUMSTIX_nIOIS16 GPIO57_nIOIS16
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+
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+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE_MD
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+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE_MD
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+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR_MD
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+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW_MD
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+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1_MD
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+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2_MD
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+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL_MD
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+#else
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+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1_MD
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+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2_MD
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+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL_MD
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+#endif
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+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG_MD
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+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT_MD
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+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16_MD
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+
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+/* CF slot 0 */
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+#define GPIO4_nBVD1_0 4
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+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
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+#define GPIO11_nCD_0 11
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+#define GPIO26_PRDY_nBSY_0 26
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+
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+#define GPIO111_nBVD1_0 111
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+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
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+#define GPIO104_nCD_0 104
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+#define GPIO96_PRDY_nBSY_0 96
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+#define GPIO109_PRDY_nBSY_0 109
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+
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+#ifndef CONFIG_ARCH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
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+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
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+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
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+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
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+#else
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+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
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+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
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+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
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+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
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+#endif
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
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+
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+#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
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+#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
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+#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
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+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
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+
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+/* CF slot 1 */
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+#define GPIO18_nBVD1_1 18
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+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
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+#define GPIO36_nCD_1 36
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+#define GPIO27_PRDY_nBSY_1 27
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+
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+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
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+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
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+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
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+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
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+
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+#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
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+#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
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+#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
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+
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+/* CF GPIO line modes */
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+#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
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+#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
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+#define GPIO_GUMSTIX_nSTSCHG_0_MD ( GPIO_GUMSTIX_nSTSCHG_0 | GPIO_IN )
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+#define GPIO_GUMSTIX_nCD_0_MD ( GPIO_GUMSTIX_nCD_0 | GPIO_IN )
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD ( GPIO_GUMSTIX_PRDY_nBSY_0 | GPIO_IN )
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD ( GPIO_GUMSTIX_PRDY_nBSY_0_OLD | GPIO_IN )
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+#define GPIO_GUMSTIX_nSTSCHG_1_MD ( GPIO_GUMSTIX_nSTSCHG_1 | GPIO_IN )
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+#define GPIO_GUMSTIX_nCD_1_MD ( GPIO_GUMSTIX_nCD_1 | GPIO_IN )
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+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD ( GPIO_GUMSTIX_PRDY_nBSY_1 | GPIO_IN )
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