mirror of https://github.com/hak5/openwrt.git
764 lines
23 KiB
Diff
764 lines
23 KiB
Diff
patches for bgmac backported from net-next/master
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--- a/drivers/net/ethernet/broadcom/Kconfig
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+++ b/drivers/net/ethernet/broadcom/Kconfig
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@@ -132,7 +132,8 @@ config BNX2X_SRIOV
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config BGMAC
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tristate "BCMA bus GBit core support"
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- depends on BCMA_HOST_SOC && HAS_DMA
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+ depends on BCMA_HOST_SOC && HAS_DMA && BCM47XX
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+ select PHYLIB
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---help---
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This driver supports GBit MAC and BCM4706 GBit MAC cores on BCMA bus.
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They can be found on BCM47xx SoCs and provide gigabit ethernet.
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--- a/drivers/net/ethernet/broadcom/bgmac.c
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+++ b/drivers/net/ethernet/broadcom/bgmac.c
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@@ -149,6 +149,8 @@ static netdev_tx_t bgmac_dma_tx_add(stru
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dma_desc->ctl0 = cpu_to_le32(ctl0);
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dma_desc->ctl1 = cpu_to_le32(ctl1);
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+ netdev_sent_queue(net_dev, skb->len);
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+
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wmb();
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/* Increase ring->end to point empty slot. We tell hardware the first
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@@ -157,6 +159,7 @@ static netdev_tx_t bgmac_dma_tx_add(stru
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if (++ring->end >= BGMAC_TX_RING_SLOTS)
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ring->end = 0;
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX,
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+ ring->index_base +
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ring->end * sizeof(struct bgmac_dma_desc));
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/* Always keep one slot free to allow detecting bugged calls. */
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@@ -177,10 +180,13 @@ static void bgmac_dma_tx_free(struct bgm
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struct device *dma_dev = bgmac->core->dma_dev;
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int empty_slot;
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bool freed = false;
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+ unsigned bytes_compl = 0, pkts_compl = 0;
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/* The last slot that hardware didn't consume yet */
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empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS);
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empty_slot &= BGMAC_DMA_TX_STATDPTR;
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+ empty_slot -= ring->index_base;
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+ empty_slot &= BGMAC_DMA_TX_STATDPTR;
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empty_slot /= sizeof(struct bgmac_dma_desc);
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while (ring->start != empty_slot) {
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@@ -192,6 +198,9 @@ static void bgmac_dma_tx_free(struct bgm
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slot->skb->len, DMA_TO_DEVICE);
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slot->dma_addr = 0;
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+ bytes_compl += slot->skb->len;
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+ pkts_compl++;
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+
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/* Free memory! :) */
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dev_kfree_skb(slot->skb);
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slot->skb = NULL;
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@@ -205,6 +214,8 @@ static void bgmac_dma_tx_free(struct bgm
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freed = true;
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}
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+ netdev_completed_queue(bgmac->net_dev, pkts_compl, bytes_compl);
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+
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if (freed && netif_queue_stopped(bgmac->net_dev))
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netif_wake_queue(bgmac->net_dev);
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}
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@@ -241,31 +252,59 @@ static int bgmac_dma_rx_skb_for_slot(str
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struct bgmac_slot_info *slot)
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{
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struct device *dma_dev = bgmac->core->dma_dev;
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+ struct sk_buff *skb;
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+ dma_addr_t dma_addr;
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struct bgmac_rx_header *rx;
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/* Alloc skb */
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- slot->skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
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- if (!slot->skb)
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+ skb = netdev_alloc_skb(bgmac->net_dev, BGMAC_RX_BUF_SIZE);
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+ if (!skb)
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return -ENOMEM;
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/* Poison - if everything goes fine, hardware will overwrite it */
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- rx = (struct bgmac_rx_header *)slot->skb->data;
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+ rx = (struct bgmac_rx_header *)skb->data;
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rx->len = cpu_to_le16(0xdead);
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rx->flags = cpu_to_le16(0xbeef);
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/* Map skb for the DMA */
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- slot->dma_addr = dma_map_single(dma_dev, slot->skb->data,
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- BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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- if (dma_mapping_error(dma_dev, slot->dma_addr)) {
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+ dma_addr = dma_map_single(dma_dev, skb->data,
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+ BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+ if (dma_mapping_error(dma_dev, dma_addr)) {
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bgmac_err(bgmac, "DMA mapping error\n");
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+ dev_kfree_skb(skb);
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return -ENOMEM;
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}
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+
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+ /* Update the slot */
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+ slot->skb = skb;
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+ slot->dma_addr = dma_addr;
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+
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if (slot->dma_addr & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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return 0;
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}
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+static void bgmac_dma_rx_setup_desc(struct bgmac *bgmac,
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+ struct bgmac_dma_ring *ring, int desc_idx)
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+{
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+ struct bgmac_dma_desc *dma_desc = ring->cpu_base + desc_idx;
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+ u32 ctl0 = 0, ctl1 = 0;
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+
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+ if (desc_idx == ring->num_slots - 1)
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+ ctl0 |= BGMAC_DESC_CTL0_EOT;
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+ ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
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+ /* Is there any BGMAC device that requires extension? */
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+ /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
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+ * B43_DMA64_DCTL1_ADDREXT_MASK;
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+ */
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+
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+ dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[desc_idx].dma_addr));
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+ dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr));
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+ dma_desc->ctl0 = cpu_to_le32(ctl0);
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+ dma_desc->ctl1 = cpu_to_le32(ctl1);
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+}
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+
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static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring,
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int weight)
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{
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@@ -274,6 +313,8 @@ static int bgmac_dma_rx_read(struct bgma
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end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS);
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end_slot &= BGMAC_DMA_RX_STATDPTR;
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+ end_slot -= ring->index_base;
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+ end_slot &= BGMAC_DMA_RX_STATDPTR;
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end_slot /= sizeof(struct bgmac_dma_desc);
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ring->end = end_slot;
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@@ -282,7 +323,6 @@ static int bgmac_dma_rx_read(struct bgma
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struct device *dma_dev = bgmac->core->dma_dev;
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struct bgmac_slot_info *slot = &ring->slots[ring->start];
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struct sk_buff *skb = slot->skb;
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- struct sk_buff *new_skb;
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struct bgmac_rx_header *rx;
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u16 len, flags;
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@@ -295,38 +335,51 @@ static int bgmac_dma_rx_read(struct bgma
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len = le16_to_cpu(rx->len);
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flags = le16_to_cpu(rx->flags);
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- /* Check for poison and drop or pass the packet */
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- if (len == 0xdead && flags == 0xbeef) {
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- bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
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- ring->start);
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- } else {
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+ do {
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+ dma_addr_t old_dma_addr = slot->dma_addr;
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+ int err;
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+
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+ /* Check for poison and drop or pass the packet */
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+ if (len == 0xdead && flags == 0xbeef) {
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+ bgmac_err(bgmac, "Found poisoned packet at slot %d, DMA issue!\n",
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+ ring->start);
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+ dma_sync_single_for_device(dma_dev,
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+ slot->dma_addr,
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+ BGMAC_RX_BUF_SIZE,
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+ DMA_FROM_DEVICE);
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+ break;
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+ }
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+
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/* Omit CRC. */
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len -= ETH_FCS_LEN;
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- new_skb = netdev_alloc_skb_ip_align(bgmac->net_dev, len);
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- if (new_skb) {
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- skb_put(new_skb, len);
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- skb_copy_from_linear_data_offset(skb, BGMAC_RX_FRAME_OFFSET,
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- new_skb->data,
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- len);
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- skb_checksum_none_assert(skb);
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- new_skb->protocol =
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- eth_type_trans(new_skb, bgmac->net_dev);
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- netif_receive_skb(new_skb);
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- handled++;
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- } else {
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- bgmac->net_dev->stats.rx_dropped++;
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- bgmac_err(bgmac, "Allocation of skb for copying packet failed!\n");
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+ /* Prepare new skb as replacement */
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+ err = bgmac_dma_rx_skb_for_slot(bgmac, slot);
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+ if (err) {
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+ /* Poison the old skb */
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+ rx->len = cpu_to_le16(0xdead);
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+ rx->flags = cpu_to_le16(0xbeef);
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+
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+ dma_sync_single_for_device(dma_dev,
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+ slot->dma_addr,
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+ BGMAC_RX_BUF_SIZE,
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+ DMA_FROM_DEVICE);
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+ break;
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}
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+ bgmac_dma_rx_setup_desc(bgmac, ring, ring->start);
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- /* Poison the old skb */
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- rx->len = cpu_to_le16(0xdead);
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- rx->flags = cpu_to_le16(0xbeef);
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- }
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-
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- /* Make it back accessible to the hardware */
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- dma_sync_single_for_device(dma_dev, slot->dma_addr,
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- BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+ /* Unmap old skb, we'll pass it to the netfif */
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+ dma_unmap_single(dma_dev, old_dma_addr,
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+ BGMAC_RX_BUF_SIZE, DMA_FROM_DEVICE);
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+
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+ skb_put(skb, BGMAC_RX_FRAME_OFFSET + len);
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+ skb_pull(skb, BGMAC_RX_FRAME_OFFSET);
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+
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+ skb_checksum_none_assert(skb);
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+ skb->protocol = eth_type_trans(skb, bgmac->net_dev);
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+ netif_receive_skb(skb);
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+ handled++;
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+ } while (0);
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if (++ring->start >= BGMAC_RX_RING_SLOTS)
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ring->start = 0;
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@@ -418,9 +471,6 @@ static int bgmac_dma_alloc(struct bgmac
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ring = &bgmac->tx_ring[i];
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ring->num_slots = BGMAC_TX_RING_SLOTS;
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ring->mmio_base = ring_base[i];
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- if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_TX))
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- bgmac_warn(bgmac, "TX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
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- ring->mmio_base);
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/* Alloc ring of descriptors */
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size = ring->num_slots * sizeof(struct bgmac_dma_desc);
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@@ -435,6 +485,13 @@ static int bgmac_dma_alloc(struct bgmac
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if (ring->dma_base & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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+ ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
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+ BGMAC_DMA_RING_TX);
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+ if (ring->unaligned)
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+ ring->index_base = lower_32_bits(ring->dma_base);
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+ else
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+ ring->index_base = 0;
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+
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/* No need to alloc TX slots yet */
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}
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@@ -444,9 +501,6 @@ static int bgmac_dma_alloc(struct bgmac
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ring = &bgmac->rx_ring[i];
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ring->num_slots = BGMAC_RX_RING_SLOTS;
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ring->mmio_base = ring_base[i];
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- if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_RX))
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- bgmac_warn(bgmac, "RX on ring 0x%X supports unaligned addressing but this feature is not implemented\n",
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- ring->mmio_base);
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/* Alloc ring of descriptors */
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size = ring->num_slots * sizeof(struct bgmac_dma_desc);
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@@ -462,6 +516,13 @@ static int bgmac_dma_alloc(struct bgmac
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if (ring->dma_base & 0xC0000000)
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bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
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+ ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
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+ BGMAC_DMA_RING_RX);
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+ if (ring->unaligned)
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+ ring->index_base = lower_32_bits(ring->dma_base);
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+ else
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+ ring->index_base = 0;
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+
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/* Alloc RX slots */
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for (j = 0; j < ring->num_slots; j++) {
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err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]);
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@@ -482,19 +543,19 @@ err_dma_free:
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static void bgmac_dma_init(struct bgmac *bgmac)
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{
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struct bgmac_dma_ring *ring;
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- struct bgmac_dma_desc *dma_desc;
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- u32 ctl0, ctl1;
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int i;
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for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) {
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ring = &bgmac->tx_ring[i];
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- /* We don't implement unaligned addressing, so enable first */
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- bgmac_dma_tx_enable(bgmac, ring);
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+ if (!ring->unaligned)
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+ bgmac_dma_tx_enable(bgmac, ring);
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO,
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lower_32_bits(ring->dma_base));
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI,
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upper_32_bits(ring->dma_base));
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+ if (ring->unaligned)
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+ bgmac_dma_tx_enable(bgmac, ring);
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ring->start = 0;
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ring->end = 0; /* Points the slot that should *not* be read */
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@@ -505,32 +566,20 @@ static void bgmac_dma_init(struct bgmac
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ring = &bgmac->rx_ring[i];
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- /* We don't implement unaligned addressing, so enable first */
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- bgmac_dma_rx_enable(bgmac, ring);
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+ if (!ring->unaligned)
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+ bgmac_dma_rx_enable(bgmac, ring);
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO,
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lower_32_bits(ring->dma_base));
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI,
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upper_32_bits(ring->dma_base));
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+ if (ring->unaligned)
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+ bgmac_dma_rx_enable(bgmac, ring);
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- for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots;
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- j++, dma_desc++) {
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- ctl0 = ctl1 = 0;
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-
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- if (j == ring->num_slots - 1)
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- ctl0 |= BGMAC_DESC_CTL0_EOT;
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- ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN;
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- /* Is there any BGMAC device that requires extension? */
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- /* ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) &
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- * B43_DMA64_DCTL1_ADDREXT_MASK;
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- */
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-
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- dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[j].dma_addr));
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- dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[j].dma_addr));
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- dma_desc->ctl0 = cpu_to_le32(ctl0);
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- dma_desc->ctl1 = cpu_to_le32(ctl1);
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- }
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+ for (j = 0; j < ring->num_slots; j++)
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+ bgmac_dma_rx_setup_desc(bgmac, ring, j);
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bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX,
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+ ring->index_base +
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ring->num_slots * sizeof(struct bgmac_dma_desc));
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ring->start = 0;
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@@ -633,70 +682,6 @@ static int bgmac_phy_write(struct bgmac
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return 0;
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}
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-/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
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-static void bgmac_phy_force(struct bgmac *bgmac)
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-{
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- u16 ctl;
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- u16 mask = ~(BGMAC_PHY_CTL_SPEED | BGMAC_PHY_CTL_SPEED_MSB |
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- BGMAC_PHY_CTL_ANENAB | BGMAC_PHY_CTL_DUPLEX);
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-
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- if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
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- return;
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-
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- if (bgmac->autoneg)
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- return;
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-
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- ctl = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL);
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- ctl &= mask;
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- if (bgmac->full_duplex)
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- ctl |= BGMAC_PHY_CTL_DUPLEX;
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- if (bgmac->speed == BGMAC_SPEED_100)
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- ctl |= BGMAC_PHY_CTL_SPEED_100;
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- else if (bgmac->speed == BGMAC_SPEED_1000)
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- ctl |= BGMAC_PHY_CTL_SPEED_1000;
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- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL, ctl);
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-}
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-
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-/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyadvertise */
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-static void bgmac_phy_advertise(struct bgmac *bgmac)
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-{
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- u16 adv;
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-
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- if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
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- return;
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-
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- if (!bgmac->autoneg)
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- return;
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-
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- /* Adv selected 10/100 speeds */
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- adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV);
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- adv &= ~(BGMAC_PHY_ADV_10HALF | BGMAC_PHY_ADV_10FULL |
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- BGMAC_PHY_ADV_100HALF | BGMAC_PHY_ADV_100FULL);
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- if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
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- adv |= BGMAC_PHY_ADV_10HALF;
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- if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
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- adv |= BGMAC_PHY_ADV_100HALF;
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- if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
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- adv |= BGMAC_PHY_ADV_10FULL;
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- if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
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- adv |= BGMAC_PHY_ADV_100FULL;
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- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV, adv);
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-
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- /* Adv selected 1000 speeds */
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- adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2);
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- adv &= ~(BGMAC_PHY_ADV2_1000HALF | BGMAC_PHY_ADV2_1000FULL);
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- if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
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- adv |= BGMAC_PHY_ADV2_1000HALF;
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- if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
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- adv |= BGMAC_PHY_ADV2_1000FULL;
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- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2, adv);
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|
-
|
|
- /* Restart */
|
|
- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
|
|
- bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) |
|
|
- BGMAC_PHY_CTL_RESTART);
|
|
-}
|
|
-
|
|
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyinit */
|
|
static void bgmac_phy_init(struct bgmac *bgmac)
|
|
{
|
|
@@ -827,19 +812,28 @@ static void bgmac_clear_mib(struct bgmac
|
|
}
|
|
|
|
/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_speed */
|
|
-static void bgmac_speed(struct bgmac *bgmac, int speed)
|
|
+static void bgmac_mac_speed(struct bgmac *bgmac)
|
|
{
|
|
u32 mask = ~(BGMAC_CMDCFG_ES_MASK | BGMAC_CMDCFG_HD);
|
|
u32 set = 0;
|
|
|
|
- if (speed & BGMAC_SPEED_10)
|
|
+ switch (bgmac->mac_speed) {
|
|
+ case SPEED_10:
|
|
set |= BGMAC_CMDCFG_ES_10;
|
|
- if (speed & BGMAC_SPEED_100)
|
|
+ break;
|
|
+ case SPEED_100:
|
|
set |= BGMAC_CMDCFG_ES_100;
|
|
- if (speed & BGMAC_SPEED_1000)
|
|
+ break;
|
|
+ case SPEED_1000:
|
|
set |= BGMAC_CMDCFG_ES_1000;
|
|
- if (!bgmac->full_duplex)
|
|
+ break;
|
|
+ default:
|
|
+ bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
|
|
+ }
|
|
+
|
|
+ if (bgmac->mac_duplex == DUPLEX_HALF)
|
|
set |= BGMAC_CMDCFG_HD;
|
|
+
|
|
bgmac_cmdcfg_maskset(bgmac, mask, set, true);
|
|
}
|
|
|
|
@@ -848,10 +842,9 @@ static void bgmac_miiconfig(struct bgmac
|
|
u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
|
|
BGMAC_DS_MM_SHIFT;
|
|
if (imode == 0 || imode == 1) {
|
|
- if (bgmac->autoneg)
|
|
- bgmac_speed(bgmac, BGMAC_SPEED_100);
|
|
- else
|
|
- bgmac_speed(bgmac, bgmac->speed);
|
|
+ bgmac->mac_speed = SPEED_100;
|
|
+ bgmac->mac_duplex = DUPLEX_FULL;
|
|
+ bgmac_mac_speed(bgmac);
|
|
}
|
|
}
|
|
|
|
@@ -884,9 +877,9 @@ static void bgmac_chip_reset(struct bgma
|
|
}
|
|
|
|
iost = bcma_aread32(core, BCMA_IOST);
|
|
- if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 10) ||
|
|
+ if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
|
|
(ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
|
|
- (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9))
|
|
+ (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
|
|
iost &= ~BGMAC_BCMA_IOST_ATTACHED;
|
|
|
|
if (iost & BGMAC_BCMA_IOST_ATTACHED) {
|
|
@@ -898,30 +891,35 @@ static void bgmac_chip_reset(struct bgma
|
|
bcma_core_enable(core, flags);
|
|
|
|
if (core->id.rev > 2) {
|
|
- bgmac_set(bgmac, BCMA_CLKCTLST, 1 << 8);
|
|
- bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 1 << 24, 1 << 24,
|
|
+ bgmac_set(bgmac, BCMA_CLKCTLST,
|
|
+ BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
|
|
+ bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
|
|
+ BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
|
|
+ BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
|
|
1000);
|
|
}
|
|
|
|
- if (ci->id == BCMA_CHIP_ID_BCM5357 || ci->id == BCMA_CHIP_ID_BCM4749 ||
|
|
+ if (ci->id == BCMA_CHIP_ID_BCM5357 ||
|
|
+ ci->id == BCMA_CHIP_ID_BCM4749 ||
|
|
ci->id == BCMA_CHIP_ID_BCM53572) {
|
|
struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
|
|
u8 et_swtype = 0;
|
|
u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY |
|
|
BGMAC_CHIPCTL_1_IF_TYPE_MII;
|
|
- char buf[2];
|
|
+ char buf[4];
|
|
|
|
- if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) {
|
|
+ if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) {
|
|
if (kstrtou8(buf, 0, &et_swtype))
|
|
bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n",
|
|
buf);
|
|
et_swtype &= 0x0f;
|
|
et_swtype <<= 4;
|
|
sw_type = et_swtype;
|
|
- } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
|
|
+ } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM5358) {
|
|
sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
|
|
- } else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
|
|
- (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
|
|
+ } else if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
|
|
+ (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
|
|
+ (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) {
|
|
sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
|
|
BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
|
|
}
|
|
@@ -960,6 +958,8 @@ static void bgmac_chip_reset(struct bgma
|
|
BGMAC_CMDCFG_CFE |
|
|
BGMAC_CMDCFG_SR,
|
|
false);
|
|
+ bgmac->mac_speed = SPEED_UNKNOWN;
|
|
+ bgmac->mac_duplex = DUPLEX_UNKNOWN;
|
|
|
|
bgmac_clear_mib(bgmac);
|
|
if (core->id.id == BCMA_CORE_4706_MAC_GBIT)
|
|
@@ -970,6 +970,8 @@ static void bgmac_chip_reset(struct bgma
|
|
bgmac_miiconfig(bgmac);
|
|
bgmac_phy_init(bgmac);
|
|
|
|
+ netdev_reset_queue(bgmac->net_dev);
|
|
+
|
|
bgmac->int_status = 0;
|
|
}
|
|
|
|
@@ -1057,13 +1059,6 @@ static void bgmac_chip_init(struct bgmac
|
|
|
|
bgmac_write(bgmac, BGMAC_RXMAX_LENGTH, 32 + ETHER_MAX_LEN);
|
|
|
|
- if (!bgmac->autoneg) {
|
|
- bgmac_speed(bgmac, bgmac->speed);
|
|
- bgmac_phy_force(bgmac);
|
|
- } else if (bgmac->speed) { /* if there is anything to adv */
|
|
- bgmac_phy_advertise(bgmac);
|
|
- }
|
|
-
|
|
if (full_init) {
|
|
bgmac_dma_init(bgmac);
|
|
if (1) /* FIXME: is there any case we don't want IRQs? */
|
|
@@ -1153,6 +1148,8 @@ static int bgmac_open(struct net_device
|
|
}
|
|
napi_enable(&bgmac->napi);
|
|
|
|
+ phy_start(bgmac->phy_dev);
|
|
+
|
|
netif_carrier_on(net_dev);
|
|
|
|
err_out:
|
|
@@ -1165,6 +1162,8 @@ static int bgmac_stop(struct net_device
|
|
|
|
netif_carrier_off(net_dev);
|
|
|
|
+ phy_stop(bgmac->phy_dev);
|
|
+
|
|
napi_disable(&bgmac->napi);
|
|
bgmac_chip_intrs_off(bgmac);
|
|
free_irq(bgmac->core->irq, net_dev);
|
|
@@ -1243,61 +1242,16 @@ static int bgmac_get_settings(struct net
|
|
{
|
|
struct bgmac *bgmac = netdev_priv(net_dev);
|
|
|
|
- cmd->supported = SUPPORTED_10baseT_Half |
|
|
- SUPPORTED_10baseT_Full |
|
|
- SUPPORTED_100baseT_Half |
|
|
- SUPPORTED_100baseT_Full |
|
|
- SUPPORTED_1000baseT_Half |
|
|
- SUPPORTED_1000baseT_Full |
|
|
- SUPPORTED_Autoneg;
|
|
-
|
|
- if (bgmac->autoneg) {
|
|
- WARN_ON(cmd->advertising);
|
|
- if (bgmac->full_duplex) {
|
|
- if (bgmac->speed & BGMAC_SPEED_10)
|
|
- cmd->advertising |= ADVERTISED_10baseT_Full;
|
|
- if (bgmac->speed & BGMAC_SPEED_100)
|
|
- cmd->advertising |= ADVERTISED_100baseT_Full;
|
|
- if (bgmac->speed & BGMAC_SPEED_1000)
|
|
- cmd->advertising |= ADVERTISED_1000baseT_Full;
|
|
- } else {
|
|
- if (bgmac->speed & BGMAC_SPEED_10)
|
|
- cmd->advertising |= ADVERTISED_10baseT_Half;
|
|
- if (bgmac->speed & BGMAC_SPEED_100)
|
|
- cmd->advertising |= ADVERTISED_100baseT_Half;
|
|
- if (bgmac->speed & BGMAC_SPEED_1000)
|
|
- cmd->advertising |= ADVERTISED_1000baseT_Half;
|
|
- }
|
|
- } else {
|
|
- switch (bgmac->speed) {
|
|
- case BGMAC_SPEED_10:
|
|
- ethtool_cmd_speed_set(cmd, SPEED_10);
|
|
- break;
|
|
- case BGMAC_SPEED_100:
|
|
- ethtool_cmd_speed_set(cmd, SPEED_100);
|
|
- break;
|
|
- case BGMAC_SPEED_1000:
|
|
- ethtool_cmd_speed_set(cmd, SPEED_1000);
|
|
- break;
|
|
- }
|
|
- }
|
|
-
|
|
- cmd->duplex = bgmac->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
|
|
-
|
|
- cmd->autoneg = bgmac->autoneg;
|
|
-
|
|
- return 0;
|
|
+ return phy_ethtool_gset(bgmac->phy_dev, cmd);
|
|
}
|
|
|
|
-#if 0
|
|
static int bgmac_set_settings(struct net_device *net_dev,
|
|
struct ethtool_cmd *cmd)
|
|
{
|
|
struct bgmac *bgmac = netdev_priv(net_dev);
|
|
|
|
- return -1;
|
|
+ return phy_ethtool_sset(bgmac->phy_dev, cmd);
|
|
}
|
|
-#endif
|
|
|
|
static void bgmac_get_drvinfo(struct net_device *net_dev,
|
|
struct ethtool_drvinfo *info)
|
|
@@ -1308,6 +1262,7 @@ static void bgmac_get_drvinfo(struct net
|
|
|
|
static const struct ethtool_ops bgmac_ethtool_ops = {
|
|
.get_settings = bgmac_get_settings,
|
|
+ .set_settings = bgmac_set_settings,
|
|
.get_drvinfo = bgmac_get_drvinfo,
|
|
};
|
|
|
|
@@ -1326,9 +1281,35 @@ static int bgmac_mii_write(struct mii_bu
|
|
return bgmac_phy_write(bus->priv, mii_id, regnum, value);
|
|
}
|
|
|
|
+static void bgmac_adjust_link(struct net_device *net_dev)
|
|
+{
|
|
+ struct bgmac *bgmac = netdev_priv(net_dev);
|
|
+ struct phy_device *phy_dev = bgmac->phy_dev;
|
|
+ bool update = false;
|
|
+
|
|
+ if (phy_dev->link) {
|
|
+ if (phy_dev->speed != bgmac->mac_speed) {
|
|
+ bgmac->mac_speed = phy_dev->speed;
|
|
+ update = true;
|
|
+ }
|
|
+
|
|
+ if (phy_dev->duplex != bgmac->mac_duplex) {
|
|
+ bgmac->mac_duplex = phy_dev->duplex;
|
|
+ update = true;
|
|
+ }
|
|
+ }
|
|
+
|
|
+ if (update) {
|
|
+ bgmac_mac_speed(bgmac);
|
|
+ phy_print_status(phy_dev);
|
|
+ }
|
|
+}
|
|
+
|
|
static int bgmac_mii_register(struct bgmac *bgmac)
|
|
{
|
|
struct mii_bus *mii_bus;
|
|
+ struct phy_device *phy_dev;
|
|
+ char bus_id[MII_BUS_ID_SIZE + 3];
|
|
int i, err = 0;
|
|
|
|
mii_bus = mdiobus_alloc();
|
|
@@ -1360,8 +1341,22 @@ static int bgmac_mii_register(struct bgm
|
|
|
|
bgmac->mii_bus = mii_bus;
|
|
|
|
+ /* Connect to the PHY */
|
|
+ snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, mii_bus->id,
|
|
+ bgmac->phyaddr);
|
|
+ phy_dev = phy_connect(bgmac->net_dev, bus_id, &bgmac_adjust_link,
|
|
+ PHY_INTERFACE_MODE_MII);
|
|
+ if (IS_ERR(phy_dev)) {
|
|
+ bgmac_err(bgmac, "PHY connecton failed\n");
|
|
+ err = PTR_ERR(phy_dev);
|
|
+ goto err_unregister_bus;
|
|
+ }
|
|
+ bgmac->phy_dev = phy_dev;
|
|
+
|
|
return err;
|
|
|
|
+err_unregister_bus:
|
|
+ mdiobus_unregister(mii_bus);
|
|
err_free_irq:
|
|
kfree(mii_bus->irq);
|
|
err_free_bus:
|
|
@@ -1416,9 +1411,6 @@ static int bgmac_probe(struct bcma_devic
|
|
bcma_set_drvdata(core, bgmac);
|
|
|
|
/* Defaults */
|
|
- bgmac->autoneg = true;
|
|
- bgmac->full_duplex = true;
|
|
- bgmac->speed = BGMAC_SPEED_10 | BGMAC_SPEED_100 | BGMAC_SPEED_1000;
|
|
memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
|
|
|
|
/* On BCM4706 we need common core to access PHY */
|
|
--- a/drivers/net/ethernet/broadcom/bgmac.h
|
|
+++ b/drivers/net/ethernet/broadcom/bgmac.h
|
|
@@ -95,7 +95,11 @@
|
|
#define BGMAC_RXQ_CTL_MDP_SHIFT 24
|
|
#define BGMAC_GPIO_SELECT 0x194
|
|
#define BGMAC_GPIO_OUTPUT_EN 0x198
|
|
-/* For 0x1e0 see BCMA_CLKCTLST */
|
|
+
|
|
+/* For 0x1e0 see BCMA_CLKCTLST. Below are BGMAC specific bits */
|
|
+#define BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ 0x00000100
|
|
+#define BGMAC_BCMA_CLKCTLST_MISC_PLL_ST 0x01000000
|
|
+
|
|
#define BGMAC_HW_WAR 0x1e4
|
|
#define BGMAC_PWR_CTL 0x1e8
|
|
#define BGMAC_DMA_BASE0 0x200 /* Tx and Rx controller */
|
|
@@ -342,10 +346,6 @@
|
|
#define BGMAC_CHIPCTL_1_SW_TYPE_RGMII 0x000000C0
|
|
#define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS 0x00010000
|
|
|
|
-#define BGMAC_SPEED_10 0x0001
|
|
-#define BGMAC_SPEED_100 0x0002
|
|
-#define BGMAC_SPEED_1000 0x0004
|
|
-
|
|
#define BGMAC_WEIGHT 64
|
|
|
|
#define ETHER_MAX_LEN 1518
|
|
@@ -384,6 +384,8 @@ struct bgmac_dma_ring {
|
|
u16 mmio_base;
|
|
struct bgmac_dma_desc *cpu_base;
|
|
dma_addr_t dma_base;
|
|
+ u32 index_base; /* Used for unaligned rings only, otherwise 0 */
|
|
+ bool unaligned;
|
|
|
|
struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS];
|
|
};
|
|
@@ -400,6 +402,7 @@ struct bgmac {
|
|
struct net_device *net_dev;
|
|
struct napi_struct napi;
|
|
struct mii_bus *mii_bus;
|
|
+ struct phy_device *phy_dev;
|
|
|
|
/* DMA */
|
|
struct bgmac_dma_ring tx_ring[BGMAC_MAX_TX_RINGS];
|
|
@@ -414,10 +417,9 @@ struct bgmac {
|
|
u32 int_mask;
|
|
u32 int_status;
|
|
|
|
- /* Speed-related */
|
|
- int speed;
|
|
- bool autoneg;
|
|
- bool full_duplex;
|
|
+ /* Current MAC state */
|
|
+ int mac_speed;
|
|
+ int mac_duplex;
|
|
|
|
u8 phyaddr;
|
|
bool has_robosw;
|