mirror of https://github.com/hak5/openwrt.git
309 lines
8.0 KiB
Diff
309 lines
8.0 KiB
Diff
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -645,3 +645,15 @@ config USB_HCD_BCMA
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for ehci and ohci.
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If unsure, say N.
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+
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+config USB_HCD_SSB
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+ tristate "SSB usb host driver"
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+ depends on SSB && EXPERIMENTAL
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+ select USB_OHCI_HCD_PLATFORM if USB_OHCI_HCD
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+ select USB_EHCI_HCD_PLATFORM if USB_EHCI_HCD
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+ help
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+ Enbale support for the EHCI and OCHI host controller on an bcma bus.
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+ It converts the bcma driver into two platform device drivers
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+ for ehci and ohci.
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+
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+ If unsure, say N.
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--- a/drivers/usb/host/Makefile
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+++ b/drivers/usb/host/Makefile
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@@ -38,3 +38,4 @@ obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-m
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obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
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obj-$(CONFIG_MIPS_ALCHEMY) += alchemy-common.o
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obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
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+obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o
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--- /dev/null
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+++ b/drivers/usb/host/ssb-hcd.c
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@@ -0,0 +1,279 @@
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+/*
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+ * Sonics Silicon Backplane
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+ * Broadcom USB-core driver (SSB bus glue)
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+ *
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+ * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Based on ssb-ohci driver
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+ * Copyright 2007 Michael Buesch <m@bues.ch>
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+ *
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+ * Derived from the OHCI-PCI driver
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+ * Copyright 1999 Roman Weissgaerber
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+ * Copyright 2000-2002 David Brownell
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+ * Copyright 1999 Linus Torvalds
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+ * Copyright 1999 Gregory P. Smith
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+ *
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+ * Derived from the USBcore related parts of Broadcom-SB
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+ * Copyright 2005-2011 Broadcom Corporation
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+#include <linux/ssb/ssb.h>
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+#include <linux/delay.h>
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+#include <linux/platform_device.h>
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+#include <linux/module.h>
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+#include <linux/usb/ehci_pdriver.h>
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+#include <linux/usb/ohci_pdriver.h>
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+
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+MODULE_AUTHOR("Hauke Mehrtens");
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+MODULE_DESCRIPTION("Common USB driver for SSB Bus");
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+MODULE_LICENSE("GPL");
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+
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+#define SSB_HCD_TMSLOW_HOSTMODE (1 << 29)
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+
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+struct ssb_hcd_device {
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+ struct platform_device *ehci_dev;
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+ struct platform_device *ohci_dev;
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+
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+ u32 enable_flags;
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+};
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+
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+static void __devinit ssb_hcd_5354wa(struct ssb_device *dev)
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+{
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+#ifdef CONFIG_SSB_DRIVER_MIPS
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+ /* Work around for 5354 failures */
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+ if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
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+ /* Change syn01 reg */
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+ ssb_write32(dev, 0x894, 0x00fe00fe);
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+
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+ /* Change syn03 reg */
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+ ssb_write32(dev, 0x89c, ssb_read32(dev, 0x89c) | 0x1);
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+ }
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+#endif
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+}
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+
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+static void __devinit ssb_hcd_usb20wa(struct ssb_device *dev)
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+{
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+ if (dev->id.coreid == SSB_DEV_USB20_HOST) {
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+ /*
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+ * USB 2.0 special considerations:
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+ *
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+ * In addition to the standard SSB reset sequence, the Host
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+ * Control Register must be programmed to bring the USB core
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+ * and various phy components out of reset.
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+ */
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+ ssb_write32(dev, 0x200, 0x7ff);
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+
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+ /* Change Flush control reg */
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+ ssb_write32(dev, 0x400, ssb_read32(dev, 0x400) & ~8);
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+ ssb_read32(dev, 0x400);
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+
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+ /* Change Shim control reg */
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+ ssb_write32(dev, 0x304, ssb_read32(dev, 0x304) & ~0x100);
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+ ssb_read32(dev, 0x304);
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+
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+ udelay(1);
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+
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+ ssb_hcd_5354wa(dev);
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+ }
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+}
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+
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+/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
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+static u32 __devinit ssb_hcd_init_chip(struct ssb_device *dev)
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+{
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+ u32 flags = 0;
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+
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+ if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV)
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+ /* Put the device into host-mode. */
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+ flags |= SSB_HCD_TMSLOW_HOSTMODE;
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+
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+ ssb_device_enable(dev, flags);
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+
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+ ssb_hcd_usb20wa(dev);
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+
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+ return flags;
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+}
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+
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+static const struct usb_ehci_pdata ehci_pdata = {
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+};
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+
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+static const struct usb_ohci_pdata ohci_pdata = {
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+};
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+
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+static struct platform_device * __devinit
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+ssb_hcd_create_pdev(struct ssb_device *dev, bool ohci, u32 addr, u32 len)
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+{
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+ struct platform_device *hci_dev;
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+ struct resource hci_res[2];
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+ int ret = -ENOMEM;
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+
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+ memset(hci_res, 0, sizeof(hci_res));
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+
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+ hci_res[0].start = addr;
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+ hci_res[0].end = hci_res[0].start + len - 1;
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+ hci_res[0].flags = IORESOURCE_MEM;
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+
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+ hci_res[1].start = dev->irq;
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+ hci_res[1].flags = IORESOURCE_IRQ;
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+
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+ hci_dev = platform_device_alloc(ohci ? "ohci-platform" :
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+ "ehci-platform" , 0);
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+ if (!hci_dev)
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+ return NULL;
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+
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+ hci_dev->dev.parent = dev->dev;
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+ hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
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+
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+ ret = platform_device_add_resources(hci_dev, hci_res,
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+ ARRAY_SIZE(hci_res));
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+ if (ret)
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+ goto err_alloc;
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+ if (ohci)
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+ ret = platform_device_add_data(hci_dev, &ohci_pdata,
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+ sizeof(ohci_pdata));
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+ else
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+ ret = platform_device_add_data(hci_dev, &ehci_pdata,
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+ sizeof(ehci_pdata));
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+ if (ret)
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+ goto err_alloc;
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+ ret = platform_device_add(hci_dev);
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+ if (ret)
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+ goto err_alloc;
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+
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+ return hci_dev;
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+
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+err_alloc:
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+ platform_device_put(hci_dev);
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+ return ERR_PTR(ret);
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+}
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+
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+static int __devinit ssb_hcd_probe(struct ssb_device *dev,
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+ const struct ssb_device_id *id)
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+{
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+ int err, tmp;
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+ int start, len;
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+ u16 chipid_top;
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+ u16 coreid = dev->id.coreid;
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+ struct ssb_hcd_device *usb_dev;
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+
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+ /* USBcores are only connected on embedded devices. */
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+ chipid_top = (dev->bus->chip_id & 0xFF00);
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+ if (chipid_top != 0x4700 && chipid_top != 0x5300)
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+ return -ENODEV;
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+
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+ /* TODO: Probably need checks here; is the core connected? */
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+
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+ if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
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+ dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
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+ return -EOPNOTSUPP;
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+
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+ usb_dev = kzalloc(sizeof(struct ssb_hcd_device), GFP_KERNEL);
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+ if (!usb_dev)
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+ return -ENOMEM;
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+
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+ /* We currently always attach SSB_DEV_USB11_HOSTDEV
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+ * as HOST OHCI. If we want to attach it as Client device,
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+ * we must branch here and call into the (yet to
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+ * be written) Client mode driver. Same for remove(). */
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+ usb_dev->enable_flags = ssb_hcd_init_chip(dev);
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+
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+ tmp = ssb_read32(dev, SSB_ADMATCH0);
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+
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+ start = ssb_admatch_base(tmp);
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+ len = (coreid == SSB_DEV_USB20_HOST) ? 0x800 : ssb_admatch_size(tmp);
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+ usb_dev->ohci_dev = ssb_hcd_create_pdev(dev, true, start, len);
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+ if (IS_ERR(usb_dev->ohci_dev)) {
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+ err = PTR_ERR(usb_dev->ohci_dev);
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+ goto err_free_usb_dev;
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+ }
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+
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+ if (coreid == SSB_DEV_USB20_HOST) {
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+ start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */
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+ usb_dev->ehci_dev = ssb_hcd_create_pdev(dev, false, start, len);
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+ if (IS_ERR(usb_dev->ehci_dev)) {
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+ err = PTR_ERR(usb_dev->ehci_dev);
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+ goto err_unregister_ohci_dev;
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+ }
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+ }
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+
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+ ssb_set_drvdata(dev, usb_dev);
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+ return 0;
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+
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+err_unregister_ohci_dev:
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+ platform_device_unregister(usb_dev->ohci_dev);
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+err_free_usb_dev:
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+ kfree(usb_dev);
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+ return err;
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+}
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+
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+static void __devexit ssb_hcd_remove(struct ssb_device *dev)
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+{
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+ struct ssb_hcd_device *usb_dev = ssb_get_drvdata(dev);
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+ struct platform_device *ohci_dev = usb_dev->ohci_dev;
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+ struct platform_device *ehci_dev = usb_dev->ehci_dev;
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+
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+ if (ohci_dev)
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+ platform_device_unregister(ohci_dev);
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+ if (ehci_dev)
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+ platform_device_unregister(ehci_dev);
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+
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+ ssb_device_disable(dev, 0);
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+}
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+
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+static void __devexit ssb_hcd_shutdown(struct ssb_device *dev)
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+{
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+ ssb_device_disable(dev, 0);
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+}
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+
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+#ifdef CONFIG_PM
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+
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+static int ssb_hcd_suspend(struct ssb_device *dev, pm_message_t state)
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+{
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+ ssb_device_disable(dev, 0);
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+
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+ return 0;
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+}
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+
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+static int ssb_hcd_resume(struct ssb_device *dev)
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+{
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+ struct ssb_hcd_device *usb_dev = ssb_get_drvdata(dev);
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+
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+ ssb_device_enable(dev, usb_dev->enable_flags);
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+
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+ return 0;
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+}
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+
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+#else /* !CONFIG_PM */
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+#define ssb_hcd_suspend NULL
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+#define ssb_hcd_resume NULL
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+#endif /* CONFIG_PM */
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+
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+static const struct ssb_device_id ssb_hcd_table[] __devinitconst = {
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+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
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+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
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+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
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+ SSB_DEVTABLE_END
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+};
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+MODULE_DEVICE_TABLE(ssb, ssb_hcd_table);
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+
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+static struct ssb_driver ssb_hcd_driver = {
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+ .name = KBUILD_MODNAME,
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+ .id_table = ssb_hcd_table,
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+ .probe = ssb_hcd_probe,
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+ .remove = __devexit_p(ssb_hcd_remove),
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+ .shutdown = ssb_hcd_shutdown,
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+ .suspend = ssb_hcd_suspend,
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+ .resume = ssb_hcd_resume,
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+};
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+
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+static int __init ssb_hcd_init(void)
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+{
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+ return ssb_driver_register(&ssb_hcd_driver);
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+}
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+module_init(ssb_hcd_init);
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+
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+static void __exit ssb_hcd_exit(void)
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+{
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+ ssb_driver_unregister(&ssb_hcd_driver);
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+}
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+module_exit(ssb_hcd_exit);
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