mirror of https://github.com/hak5/openwrt.git
167 lines
3.4 KiB
Diff
167 lines
3.4 KiB
Diff
From 02bbf3c46e1e38e9ca699143566903683e3a015d Mon Sep 17 00:00:00 2001
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From: Ram Chandra Jangir <rjangir@codeaurora.org>
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Date: Thu, 20 Apr 2017 10:45:00 +0530
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Subject: [PATCH] dts: ipq4019: add nand and qpic bam dma node
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This change adds QPIC BAM dma and NAND driver node's in
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IPQ4019 device tree, also enable this for AP-DK04.1 based
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boards.
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Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 75 +++++++++++++++++++++++++++
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 38 ++++++++++++++
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2 files changed, 113 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
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@@ -88,6 +88,86 @@
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bias-disable;
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};
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};
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+
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+ nand_pins: nand_pins {
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+
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+ mux_1 {
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+ pins = "gpio52", "gpio53", "gpio54",
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+ "gpio55", "gpio56", "gpio61",
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+ "gpio62", "gpio63", "gpio69";
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+ function = "qpic_pad";
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+ bias-disable;
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+ };
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+
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+ mux_2 {
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+ pins = "gpio67";
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+ function = "qpic_pad0";
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+ bias-disable;
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+ };
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+
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+ mux_3 {
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+ pins = "gpio64";
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+ function = "qpic_pad1";
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+ bias-disable;
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+ };
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+
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+ mux_4 {
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+ pins = "gpio65";
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+ function = "qpic_pad2";
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+ bias-disable;
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+ };
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+
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+ mux_5 {
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+ pins = "gpio66";
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+ function = "qpic_pad3";
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+ bias-disable;
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+ };
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+
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+ mux_6 {
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+ pins = "gpio57";
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+ function = "qpic_pad4";
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+ bias-disable;
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+ };
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+
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+ mux_7 {
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+ pins = "gpio58";
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+ function = "qpic_pad5";
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+ bias-disable;
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+ };
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+
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+ mux_8 {
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+ pins = "gpio59";
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+ function = "qpic_pad6";
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+ bias-disable;
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+ };
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+
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+ mux_9 {
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+ pins = "gpio60";
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+ function = "qpic_pad7";
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+ bias-disable;
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+ };
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+
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+ mux_10 {
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+ pins = "gpio68";
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+ function = "qpic_pad8";
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+ bias-disable;
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+ };
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+
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+ pullups {
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+ pins = "gpio52", "gpio53", "gpio58",
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+ "gpio59";
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+ bias-pull-up;
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+ };
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+
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+ pulldowns {
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+ pins = "gpio54", "gpio55", "gpio56",
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+ "gpio57", "gpio60", "gpio61",
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+ "gpio62", "gpio63", "gpio64",
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+ "gpio65", "gpio66", "gpio67",
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+ "gpio68", "gpio69";
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+ bias-pull-down;
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+ };
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+ };
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};
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blsp_dma: dma@7884000 {
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@@ -159,5 +239,15 @@
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watchdog@b017000 {
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status = "ok";
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};
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+
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+ qpic_bam: dma@7984000 {
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+ status = "ok";
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+ };
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+
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+ nand: qpic-nand@79b0000 {
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+ pinctrl-0 = <&nand_pins>;
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+ pinctrl-names = "default";
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+ status = "ok";
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+ };
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};
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};
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -580,5 +580,43 @@
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"legacy";
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status = "disabled";
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};
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+
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+ qpic_bam: dma@7984000 {
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+ compatible = "qcom,bam-v1.7.0";
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+ reg = <0x7984000 0x1a000>;
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+ interrupts = <0 101 0>;
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+ clocks = <&gcc GCC_QPIC_AHB_CLK>;
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+ clock-names = "bam_clk";
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+ #dma-cells = <1>;
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+ qcom,ee = <0>;
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+ status = "disabled";
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+ };
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+
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+ nand: qpic-nand@79b0000 {
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+ compatible = "qcom,ebi2-nandc-bam", "qcom,msm-nand";
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+ reg = <0x79b0000 0x1000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&gcc GCC_QPIC_CLK>,
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+ <&gcc GCC_QPIC_AHB_CLK>;
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+ clock-names = "core", "aon";
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+
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+ dmas = <&qpic_bam 0>,
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+ <&qpic_bam 1>,
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+ <&qpic_bam 2>;
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+ dma-names = "tx", "rx", "cmd";
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+ status = "disabled";
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+
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+ nandcs@0 {
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+ compatible = "qcom,nandcs";
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ nand-ecc-strength = <4>;
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+ nand-ecc-step-size = <512>;
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+ nand-bus-width = <8>;
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+ };
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+ };
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};
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};
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