mirror of https://github.com/hak5/openwrt.git
99 lines
3.2 KiB
Diff
99 lines
3.2 KiB
Diff
From 81c54afc5bc918ea3ed65cc356236b302b1f21ca Mon Sep 17 00:00:00 2001
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From: Sean Wang <sean.wang@mediatek.com>
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Date: Wed, 18 Oct 2017 16:28:46 +0800
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Subject: [PATCH 120/224] soc: mediatek: pwrap: add MediaTek MT6380 as one
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slave of pwrap
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Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
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and also add extra new regmap_config of 32-bit mode for MT6380
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since old regmap_config of 16-bit mode can't be fit into the need.
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Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
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Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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drivers/soc/mediatek/mtk-pmic-wrap.c | 24 +++++++++++++++++++++---
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1 file changed, 21 insertions(+), 3 deletions(-)
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--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
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+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
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@@ -507,6 +507,7 @@ struct pmic_wrapper;
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struct pwrap_slv_type {
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const u32 *dew_regs;
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enum pmic_type type;
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+ const struct regmap_config *regmap;
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/* Flags indicating the capability for the target slave */
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u32 caps;
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/*
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@@ -1149,7 +1150,7 @@ static irqreturn_t pwrap_interrupt(int i
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return IRQ_HANDLED;
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}
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-static const struct regmap_config pwrap_regmap_config = {
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+static const struct regmap_config pwrap_regmap_config16 = {
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.reg_bits = 16,
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.val_bits = 16,
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.reg_stride = 2,
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@@ -1158,9 +1159,19 @@ static const struct regmap_config pwrap_
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.max_register = 0xffff,
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};
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+static const struct regmap_config pwrap_regmap_config32 = {
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+ .reg_bits = 32,
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+ .val_bits = 32,
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+ .reg_stride = 4,
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+ .reg_read = pwrap_regmap_read,
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+ .reg_write = pwrap_regmap_write,
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+ .max_register = 0xffff,
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+};
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+
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static const struct pwrap_slv_type pmic_mt6323 = {
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.dew_regs = mt6323_regs,
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.type = PMIC_MT6323,
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+ .regmap = &pwrap_regmap_config16,
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.caps = PWRAP_SLV_CAP_SPI | PWRAP_SLV_CAP_DUALIO |
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PWRAP_SLV_CAP_SECURITY,
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.pwrap_read = pwrap_read16,
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@@ -1170,6 +1181,7 @@ static const struct pwrap_slv_type pmic_
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static const struct pwrap_slv_type pmic_mt6380 = {
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.dew_regs = NULL,
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.type = PMIC_MT6380,
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+ .regmap = &pwrap_regmap_config32,
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.caps = 0,
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.pwrap_read = pwrap_read32,
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.pwrap_write = pwrap_write32,
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@@ -1178,6 +1190,7 @@ static const struct pwrap_slv_type pmic_
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static const struct pwrap_slv_type pmic_mt6397 = {
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.dew_regs = mt6397_regs,
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.type = PMIC_MT6397,
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+ .regmap = &pwrap_regmap_config16,
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.caps = PWRAP_SLV_CAP_SPI | PWRAP_SLV_CAP_DUALIO |
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PWRAP_SLV_CAP_SECURITY,
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.pwrap_read = pwrap_read16,
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@@ -1189,9 +1202,14 @@ static const struct of_device_id of_slav
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.compatible = "mediatek,mt6323",
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.data = &pmic_mt6323,
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}, {
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+ /* The MT6380 PMIC only implements a regulator, so we bind it
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+ * directly instead of using a MFD.
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+ */
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+ .compatible = "mediatek,mt6380-regulator",
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+ .data = &pmic_mt6380,
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+ }, {
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.compatible = "mediatek,mt6397",
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.data = &pmic_mt6397,
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- }, {
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/* sentinel */
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}
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};
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@@ -1372,7 +1390,7 @@ static int pwrap_probe(struct platform_d
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if (ret)
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goto err_out2;
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- wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, &pwrap_regmap_config);
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+ wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap);
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if (IS_ERR(wrp->regmap)) {
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ret = PTR_ERR(wrp->regmap);
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goto err_out2;
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