mirror of https://github.com/hak5/openwrt.git
114 lines
3.0 KiB
Diff
114 lines
3.0 KiB
Diff
From f48780829e9de625cb7fa0850fc31d050da6adeb Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Fri, 15 Feb 2013 13:38:16 +0000
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Subject: [PATCH] MIPS: ath79: add SoC detection code for the QCA955X SoCs
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commit 2e6c91e392fd7be2ef0ba1e9a20e0ebe8ab79cf3 upstream.
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Also add 'soc_is_qca955[68x]' helper functions
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and a Kconfig symbol for the SoC family.
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Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
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Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
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Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4943/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/Kconfig | 4 ++++
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arch/mips/ath79/setup.c | 18 +++++++++++++++++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++
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arch/mips/include/asm/mach-ath79/ath79.h | 17 +++++++++++++++++
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4 files changed, 40 insertions(+), 1 deletion(-)
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -88,6 +88,10 @@ config SOC_AR934X
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select PCI_AR724X if PCI
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def_bool n
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+config SOC_QCA955X
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+ select USB_ARCH_HAS_EHCI
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+ def_bool n
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+
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config PCI_AR724X
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def_bool n
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--- a/arch/mips/ath79/setup.c
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+++ b/arch/mips/ath79/setup.c
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@@ -164,13 +164,29 @@ static void __init ath79_detect_sys_type
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rev = id & AR934X_REV_ID_REVISION_MASK;
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break;
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+ case REV_ID_MAJOR_QCA9556:
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+ ath79_soc = ATH79_SOC_QCA9556;
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+ chip = "9556";
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+ rev = id & QCA955X_REV_ID_REVISION_MASK;
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+ break;
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+
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+ case REV_ID_MAJOR_QCA9558:
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+ ath79_soc = ATH79_SOC_QCA9558;
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+ chip = "9558";
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+ rev = id & QCA955X_REV_ID_REVISION_MASK;
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+ break;
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+
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default:
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panic("ath79: unknown SoC, id:0x%08x", id);
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}
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ath79_soc_rev = rev;
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- sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
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+ if (soc_is_qca955x())
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+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
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+ chip, rev);
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+ else
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+ sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
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pr_info("SoC: %s\n", ath79_sys_type);
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -392,6 +392,8 @@
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#define AR934X_REV_ID_REVISION_MASK 0xf
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+#define QCA955X_REV_ID_REVISION_MASK 0xf
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+
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/*
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* SPI block
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*/
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--- a/arch/mips/include/asm/mach-ath79/ath79.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79.h
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@@ -32,6 +32,8 @@ enum ath79_soc_type {
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ATH79_SOC_AR9341,
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ATH79_SOC_AR9342,
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ATH79_SOC_AR9344,
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+ ATH79_SOC_QCA9556,
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+ ATH79_SOC_QCA9558,
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};
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extern enum ath79_soc_type ath79_soc;
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@@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void)
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return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
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}
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+static inline int soc_is_qca9556(void)
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+{
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+ return ath79_soc == ATH79_SOC_QCA9556;
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+}
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+
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+static inline int soc_is_qca9558(void)
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+{
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+ return ath79_soc == ATH79_SOC_QCA9558;
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+}
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+
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+static inline int soc_is_qca955x(void)
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+{
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+ return soc_is_qca9556() || soc_is_qca9558();
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+}
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+
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extern void __iomem *ath79_ddr_base;
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extern void __iomem *ath79_pll_base;
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extern void __iomem *ath79_reset_base;
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