mirror of https://github.com/hak5/openwrt.git
45 lines
1.5 KiB
Diff
45 lines
1.5 KiB
Diff
On many Marvell SoCs, the pins used for the SDIO interface are part of
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the MPP pins, that are muxable pins. In order to get the muxing of
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those pins correct, this commit integrates the mvsdio driver with the
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pinctrl infrastructure by calling devm_pinctrl_get_select_default()
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during ->probe().
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Note that we permit this function to fail because not all Marvell
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platforms have yet been fully converted to using the pinctrl
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infrastructure.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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---
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drivers/mmc/host/mvsdio.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/mmc/host/mvsdio.c
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+++ b/drivers/mmc/host/mvsdio.c
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@@ -25,6 +25,7 @@
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#include <linux/of_irq.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/slot-gpio.h>
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+#include <linux/pinctrl/consumer.h>
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#include <asm/sizes.h>
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#include <asm/unaligned.h>
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@@ -692,6 +693,7 @@ static int __init mvsd_probe(struct plat
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struct resource *r;
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int ret, irq;
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int gpio_card_detect, gpio_write_protect;
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+ struct pinctrl *pinctrl;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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irq = platform_get_irq(pdev, 0);
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@@ -713,6 +715,10 @@ static int __init mvsd_probe(struct plat
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host->dev = &pdev->dev;
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host->res = r;
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+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
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+ if (IS_ERR(pinctrl))
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+ dev_warn(&pdev->dev, "no pins associated\n");
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+
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/* Some non-DT platforms do not pass a clock, and the clock
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frequency is passed through platform_data. On DT platforms,
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a clock must always be passed, even if there is no gatable
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