mirror of https://github.com/hak5/openwrt.git
520 lines
16 KiB
Diff
520 lines
16 KiB
Diff
From 65c07535b97006d7bd50ec14871a116e793a24ad Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <blogic@openwrt.org>
|
|
Date: Fri, 3 Aug 2012 10:27:25 +0200
|
|
Subject: [PATCH 09/34] MIPS: lantiq: add atm hack
|
|
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
|
---
|
|
arch/mips/include/asm/mach-lantiq/lantiq_atm.h | 196 +++++++++++++++++++++++
|
|
arch/mips/include/asm/mach-lantiq/lantiq_ptm.h | 203 ++++++++++++++++++++++++
|
|
arch/mips/lantiq/irq.c | 2 +
|
|
arch/mips/mm/cache.c | 2 +
|
|
include/uapi/linux/atm.h | 6 +
|
|
net/atm/common.c | 6 +
|
|
net/atm/proc.c | 2 +-
|
|
7 files changed, 416 insertions(+), 1 deletion(-)
|
|
create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_atm.h
|
|
create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
|
|
|
|
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_atm.h b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
|
|
new file mode 100644
|
|
index 0000000..bf045a9
|
|
--- /dev/null
|
|
+++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
|
|
@@ -0,0 +1,196 @@
|
|
+/******************************************************************************
|
|
+**
|
|
+** FILE NAME : ifx_atm.h
|
|
+** PROJECT : UEIP
|
|
+** MODULES : ATM
|
|
+**
|
|
+** DATE : 17 Jun 2009
|
|
+** AUTHOR : Xu Liang
|
|
+** DESCRIPTION : Global ATM driver header file
|
|
+** COPYRIGHT : Copyright (c) 2006
|
|
+** Infineon Technologies AG
|
|
+** Am Campeon 1-12, 85579 Neubiberg, Germany
|
|
+**
|
|
+** This program is free software; you can redistribute it and/or modify
|
|
+** it under the terms of the GNU General Public License as published by
|
|
+** the Free Software Foundation; either version 2 of the License, or
|
|
+** (at your option) any later version.
|
|
+**
|
|
+** HISTORY
|
|
+** $Date $Author $Comment
|
|
+** 07 JUL 2009 Xu Liang Init Version
|
|
+*******************************************************************************/
|
|
+
|
|
+#ifndef IFX_ATM_H
|
|
+#define IFX_ATM_H
|
|
+
|
|
+
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_ATM UEIP Project - ATM driver module
|
|
+ \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_ATM_IOCTL IOCTL Commands
|
|
+ \ingroup IFX_ATM
|
|
+ \brief IOCTL Commands used by user application.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_ATM_STRUCT Structures
|
|
+ \ingroup IFX_ATM
|
|
+ \brief Structures used by user application.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \file ifx_atm.h
|
|
+ \ingroup IFX_ATM
|
|
+ \brief ATM driver header file
|
|
+ */
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * Definition
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \addtogroup IFX_ATM_STRUCT
|
|
+ */
|
|
+/*@{*/
|
|
+
|
|
+/*
|
|
+ * ATM MIB
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \struct atm_cell_ifEntry_t
|
|
+ \brief Structure used for Cell Level MIB Counters.
|
|
+
|
|
+ User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
|
|
+ */
|
|
+typedef struct {
|
|
+ __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */
|
|
+ __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */
|
|
+ __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */
|
|
+ __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */
|
|
+ __u32 ifInErrors; /*!< counter of error ingress cells */
|
|
+ __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */
|
|
+ __u32 ifOutErrors; /*!< counter of error egress cells */
|
|
+} atm_cell_ifEntry_t;
|
|
+
|
|
+/*!
|
|
+ \struct atm_aal5_ifEntry_t
|
|
+ \brief Structure used for AAL5 Frame Level MIB Counters.
|
|
+
|
|
+ User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
|
|
+ */
|
|
+typedef struct {
|
|
+ __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
|
|
+ __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
|
|
+ __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */
|
|
+ __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */
|
|
+ __u32 ifInUcastPkts; /*!< counter of ingress packets */
|
|
+ __u32 ifOutUcastPkts; /*!< counter of egress packets */
|
|
+ __u32 ifInErrors; /*!< counter of error ingress packets */
|
|
+ __u32 ifInDiscards; /*!< counter of dropped ingress packets */
|
|
+ __u32 ifOutErros; /*!< counter of error egress packets */
|
|
+ __u32 ifOutDiscards; /*!< counter of dropped egress packets */
|
|
+} atm_aal5_ifEntry_t;
|
|
+
|
|
+/*!
|
|
+ \struct atm_aal5_vcc_t
|
|
+ \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
|
|
+
|
|
+ This structure is a part of structure "atm_aal5_vcc_x_t".
|
|
+ */
|
|
+typedef struct {
|
|
+ __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */
|
|
+ __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet
|
|
+ __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */
|
|
+} atm_aal5_vcc_t;
|
|
+
|
|
+/*!
|
|
+ \struct atm_aal5_vcc_x_t
|
|
+ \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
|
|
+
|
|
+ User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
|
|
+ */
|
|
+typedef struct {
|
|
+ int vpi; /*!< VPI of the VCC to get MIB counters */
|
|
+ int vci; /*!< VCI of the VCC to get MIB counters */
|
|
+ atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */
|
|
+} atm_aal5_vcc_x_t;
|
|
+
|
|
+/*@}*/
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * IOCTL
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \addtogroup IFX_ATM_IOCTL
|
|
+ */
|
|
+/*@{*/
|
|
+
|
|
+/*
|
|
+ * ioctl Command
|
|
+ */
|
|
+/*!
|
|
+ \brief ATM IOCTL Magic Number
|
|
+ */
|
|
+#define PPE_ATM_IOC_MAGIC 'o'
|
|
+/*!
|
|
+ \brief ATM IOCTL Command - Get Cell Level MIB Counters
|
|
+
|
|
+ This command is obsolete. User can get cell level MIB from DSL API.
|
|
+ This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
|
|
+ */
|
|
+#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
|
|
+/*!
|
|
+ \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
|
|
+
|
|
+ Get AAL5 packet counters.
|
|
+ This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
|
|
+ */
|
|
+#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
|
|
+/*!
|
|
+ \brief ATM IOCTL Command - Get Per PVC MIB Counters
|
|
+
|
|
+ Get AAL5 packet counters for each PVC.
|
|
+ This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
|
|
+ */
|
|
+#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
|
|
+/*!
|
|
+ \brief Total Number of ATM IOCTL Commands
|
|
+ */
|
|
+#define PPE_ATM_IOC_MAXNR 3
|
|
+
|
|
+/*@}*/
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * API
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+#ifdef __KERNEL__
|
|
+struct port_cell_info {
|
|
+ unsigned int port_num;
|
|
+ unsigned int tx_link_rate[2];
|
|
+};
|
|
+#endif
|
|
+
|
|
+
|
|
+
|
|
+#endif // IFX_ATM_H
|
|
+
|
|
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
|
|
new file mode 100644
|
|
index 0000000..698e5c3
|
|
--- /dev/null
|
|
+++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
|
|
@@ -0,0 +1,203 @@
|
|
+/******************************************************************************
|
|
+**
|
|
+** FILE NAME : ifx_ptm.h
|
|
+** PROJECT : UEIP
|
|
+** MODULES : PTM
|
|
+**
|
|
+** DATE : 17 Jun 2009
|
|
+** AUTHOR : Xu Liang
|
|
+** DESCRIPTION : Global PTM driver header file
|
|
+** COPYRIGHT : Copyright (c) 2006
|
|
+** Infineon Technologies AG
|
|
+** Am Campeon 1-12, 85579 Neubiberg, Germany
|
|
+**
|
|
+** This program is free software; you can redistribute it and/or modify
|
|
+** it under the terms of the GNU General Public License as published by
|
|
+** the Free Software Foundation; either version 2 of the License, or
|
|
+** (at your option) any later version.
|
|
+**
|
|
+** HISTORY
|
|
+** $Date $Author $Comment
|
|
+** 07 JUL 2009 Xu Liang Init Version
|
|
+*******************************************************************************/
|
|
+
|
|
+#ifndef IFX_PTM_H
|
|
+#define IFX_PTM_H
|
|
+
|
|
+
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_PTM UEIP Project - PTM driver module
|
|
+ \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_PTM_IOCTL IOCTL Commands
|
|
+ \ingroup IFX_PTM
|
|
+ \brief IOCTL Commands used by user application.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \defgroup IFX_PTM_STRUCT Structures
|
|
+ \ingroup IFX_PTM
|
|
+ \brief Structures used by user application.
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \file ifx_ptm.h
|
|
+ \ingroup IFX_PTM
|
|
+ \brief PTM driver header file
|
|
+ */
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * Definition
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * IOCTL
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \addtogroup IFX_PTM_IOCTL
|
|
+ */
|
|
+/*@{*/
|
|
+
|
|
+/*
|
|
+ * ioctl Command
|
|
+ */
|
|
+/*!
|
|
+ \brief PTM IOCTL Command - Get codeword MIB counters.
|
|
+
|
|
+ This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
|
|
+ */
|
|
+#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1
|
|
+/*!
|
|
+ \brief PTM IOCTL Command - Get packet MIB counters.
|
|
+
|
|
+ This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
|
|
+ */
|
|
+#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2
|
|
+/*!
|
|
+ \brief PTM IOCTL Command - Get firmware configuration (CRC).
|
|
+
|
|
+ This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
|
|
+ */
|
|
+#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3
|
|
+/*!
|
|
+ \brief PTM IOCTL Command - Set firmware configuration (CRC).
|
|
+
|
|
+ This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
|
|
+ */
|
|
+#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4
|
|
+/*!
|
|
+ \brief PTM IOCTL Command - Program priority value to TX queue mapping.
|
|
+
|
|
+ This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
|
|
+ */
|
|
+#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14
|
|
+
|
|
+/*@}*/
|
|
+
|
|
+
|
|
+/*!
|
|
+ \addtogroup IFX_PTM_STRUCT
|
|
+ */
|
|
+/*@{*/
|
|
+
|
|
+/*
|
|
+ * ioctl Data Type
|
|
+ */
|
|
+
|
|
+/*!
|
|
+ \typedef PTM_CW_IF_ENTRY_T
|
|
+ \brief Wrapping of structure "ptm_cw_ifEntry_t".
|
|
+ */
|
|
+/*!
|
|
+ \struct ptm_cw_ifEntry_t
|
|
+ \brief Structure used for CodeWord level MIB counters.
|
|
+ */
|
|
+typedef struct ptm_cw_ifEntry_t {
|
|
+ uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */
|
|
+ uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */
|
|
+ uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */
|
|
+ uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */
|
|
+ uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */
|
|
+} PTM_CW_IF_ENTRY_T;
|
|
+
|
|
+/*!
|
|
+ \typedef PTM_FRAME_MIB_T
|
|
+ \brief Wrapping of structure "ptm_frame_mib_t".
|
|
+ */
|
|
+/*!
|
|
+ \struct ptm_frame_mib_t
|
|
+ \brief Structure used for packet level MIB counters.
|
|
+ */
|
|
+typedef struct ptm_frame_mib_t {
|
|
+ uint32_t RxCorrect; /*!< output, number of ingress packet */
|
|
+ uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */
|
|
+ uint32_t RxDropped; /*!< output, number of dropped ingress packet */
|
|
+ uint32_t TxSend; /*!< output, number of egress packet */
|
|
+} PTM_FRAME_MIB_T;
|
|
+
|
|
+/*!
|
|
+ \typedef IFX_PTM_CFG_T
|
|
+ \brief Wrapping of structure "ptm_cfg_t".
|
|
+ */
|
|
+/*!
|
|
+ \struct ptm_cfg_t
|
|
+ \brief Structure used for ETH/TC CRC configuration.
|
|
+ */
|
|
+typedef struct ptm_cfg_t {
|
|
+ uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */
|
|
+ uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */
|
|
+ uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */
|
|
+ uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */
|
|
+ uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */
|
|
+ uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */
|
|
+ uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */
|
|
+} IFX_PTM_CFG_T;
|
|
+
|
|
+/*!
|
|
+ \typedef IFX_PTM_PRIO_Q_MAP_T
|
|
+ \brief Wrapping of structure "ppe_prio_q_map".
|
|
+ */
|
|
+/*!
|
|
+ \struct ppe_prio_q_map
|
|
+ \brief Structure used for Priority Value to TX Queue mapping.
|
|
+ */
|
|
+typedef struct ppe_prio_q_map {
|
|
+ int pkt_prio;
|
|
+ int qid;
|
|
+ int vpi; // ignored in eth interface
|
|
+ int vci; // ignored in eth interface
|
|
+} IFX_PTM_PRIO_Q_MAP_T;
|
|
+
|
|
+/*@}*/
|
|
+
|
|
+
|
|
+
|
|
+/*
|
|
+ * ####################################
|
|
+ * API
|
|
+ * ####################################
|
|
+ */
|
|
+
|
|
+#ifdef __KERNEL__
|
|
+struct port_cell_info {
|
|
+ unsigned int port_num;
|
|
+ unsigned int tx_link_rate[2];
|
|
+};
|
|
+#endif
|
|
+
|
|
+
|
|
+
|
|
+#endif // IFX_PTM_H
|
|
+
|
|
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
|
|
index 5119487..6d2c486 100644
|
|
--- a/arch/mips/lantiq/irq.c
|
|
+++ b/arch/mips/lantiq/irq.c
|
|
@@ -14,6 +14,7 @@
|
|
#include <linux/of_platform.h>
|
|
#include <linux/of_address.h>
|
|
#include <linux/of_irq.h>
|
|
+#include <linux/module.h>
|
|
|
|
#include <asm/bootinfo.h>
|
|
#include <asm/irq_cpu.h>
|
|
@@ -99,6 +100,7 @@ void ltq_mask_and_ack_irq(struct irq_data *d)
|
|
ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
|
|
ltq_icu_w32(im, BIT(offset), isr);
|
|
}
|
|
+EXPORT_SYMBOL(ltq_mask_and_ack_irq);
|
|
|
|
static void ltq_ack_irq(struct irq_data *d)
|
|
{
|
|
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
|
|
index 5aeb3eb..11aa4e6 100644
|
|
--- a/arch/mips/mm/cache.c
|
|
+++ b/arch/mips/mm/cache.c
|
|
@@ -58,6 +58,8 @@ void (*_dma_cache_wback)(unsigned long start, unsigned long size);
|
|
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
|
|
|
|
EXPORT_SYMBOL(_dma_cache_wback_inv);
|
|
+EXPORT_SYMBOL(_dma_cache_wback);
|
|
+EXPORT_SYMBOL(_dma_cache_inv);
|
|
|
|
#endif /* CONFIG_DMA_NONCOHERENT */
|
|
|
|
diff --git a/include/uapi/linux/atm.h b/include/uapi/linux/atm.h
|
|
index 88399db..78c8bbc 100644
|
|
--- a/include/uapi/linux/atm.h
|
|
+++ b/include/uapi/linux/atm.h
|
|
@@ -130,8 +130,14 @@
|
|
#define ATM_ABR 4
|
|
#define ATM_ANYCLASS 5 /* compatible with everything */
|
|
|
|
+#define ATM_VBR_NRT ATM_VBR
|
|
+#define ATM_VBR_RT 6
|
|
+#define ATM_UBR_PLUS 7
|
|
+#define ATM_GFR 8
|
|
+
|
|
#define ATM_MAX_PCR -1 /* maximum available PCR */
|
|
|
|
+
|
|
struct atm_trafprm {
|
|
unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
|
|
int max_pcr; /* maximum PCR in cells per second */
|
|
diff --git a/net/atm/common.c b/net/atm/common.c
|
|
index 737bef5..959008d 100644
|
|
--- a/net/atm/common.c
|
|
+++ b/net/atm/common.c
|
|
@@ -62,11 +62,17 @@ static void vcc_remove_socket(struct sock *sk)
|
|
write_unlock_irq(&vcc_sklist_lock);
|
|
}
|
|
|
|
+struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
|
|
+EXPORT_SYMBOL(ifx_atm_alloc_tx);
|
|
+
|
|
static struct sk_buff *alloc_tx(struct atm_vcc *vcc, unsigned int size)
|
|
{
|
|
struct sk_buff *skb;
|
|
struct sock *sk = sk_atm(vcc);
|
|
|
|
+ if (ifx_atm_alloc_tx != NULL)
|
|
+ return ifx_atm_alloc_tx(vcc, size);
|
|
+
|
|
if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) {
|
|
pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n",
|
|
sk_wmem_alloc_get(sk), size, sk->sk_sndbuf);
|
|
diff --git a/net/atm/proc.c b/net/atm/proc.c
|
|
index bbb6461..ecb584a 100644
|
|
--- a/net/atm/proc.c
|
|
+++ b/net/atm/proc.c
|
|
@@ -154,7 +154,7 @@ static void *vcc_seq_next(struct seq_file *seq, void *v, loff_t *pos)
|
|
static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
|
|
{
|
|
static const char *const class_name[] = {
|
|
- "off", "UBR", "CBR", "VBR", "ABR"};
|
|
+ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
|
|
static const char *const aal_name[] = {
|
|
"---", "1", "2", "3/4", /* 0- 3 */
|
|
"???", "5", "???", "???", /* 4- 7 */
|
|
--
|
|
1.7.10.4
|
|
|