mirror of https://github.com/hak5/openwrt.git
77 lines
2.3 KiB
Diff
77 lines
2.3 KiB
Diff
From b404f3daca1807a74e07180397c6e85046b7a5cd Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
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Date: Fri, 18 Jul 2014 15:58:58 -0300
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Subject: [PATCH] ARM: sunxi: Add codec clock support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This commit adds the codec clock definition to the sun4i, sun5i and
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sun7i device trees. The codec clock is used in the analog codec block.
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Signed-off-by: Emilio López <emilio@elopez.com.ar>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun4i-a10.dtsi | 8 ++++++++
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arch/arm/boot/dts/sun5i.dtsi | 8 ++++++++
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arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
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3 files changed, 24 insertions(+)
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diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
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index fab13af..abea24e 100644
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--- a/arch/arm/boot/dts/sun4i-a10.dtsi
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+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
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@@ -454,6 +454,14 @@
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clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
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clock-output-names = "spi3";
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};
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+
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+ codec_clk: clk@01c20140 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-codec-clk";
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+ reg = <0x01c20140 0x4>;
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+ clocks = <&pll2 0>;
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+ clock-output-names = "codec";
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+ };
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};
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soc@01c00000 {
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diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
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index a4b6a66..5c0edd6 100644
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--- a/arch/arm/boot/dts/sun5i-a13.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
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@@ -292,6 +292,14 @@
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clock-output-names = "usb_ohci0", "usb_phy";
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};
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+ codec_clk: clk@01c20140 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-codec-clk";
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+ reg = <0x01c20140 0x4>;
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+ clocks = <&pll2 0>;
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+ clock-output-names = "codec";
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+ };
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+
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mbus_clk: clk@01c2015c {
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#clock-cells = <0>;
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compatible = "allwinner,sun5i-a13-mbus-clk";
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diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
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index 12d9ffd..400e696 100644
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -468,6 +468,14 @@
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clock-output-names = "spi3";
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};
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+ codec_clk: clk@01c20140 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-codec-clk";
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+ reg = <0x01c20140 0x4>;
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+ clocks = <&pll2 0>;
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+ clock-output-names = "codec";
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+ };
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+
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mbus_clk: clk@01c2015c {
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#clock-cells = <0>;
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compatible = "allwinner,sun5i-a13-mbus-clk";
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