mirror of https://github.com/hak5/openwrt.git
41 lines
1.6 KiB
Diff
41 lines
1.6 KiB
Diff
From dbdeca565b0850da182d3bd0b3ed41f667ca8a45 Mon Sep 17 00:00:00 2001
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From: Daniel Matuschek <info@crazy-audio.com>
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Date: Wed, 15 Jan 2014 21:41:23 +0100
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Subject: [PATCH 066/170] ASoC: wm8804: Implement MCLK configuration options,
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add 32bit support WM8804 can run with PLL frequencies of 256xfs and 128xfs
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for most sample rates. At 192kHz only 128xfs is supported. The existing
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driver selects 128xfs automatically for some lower samples rates. By using an
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additional mclk_div divider, it is now possible to control the behaviour.
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This allows using 256xfs PLL frequency on all sample rates up to 96kHz. It
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should allow lower jitter and better signal quality. The behavior has to be
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controlled by the sound card driver, because some sample frequency share the
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same setting. e.g. 192kHz and 96kHz use 24.576MHz master clock. The only
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difference is the MCLK divider.
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This also added support for 32bit data.
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Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
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---
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sound/soc/codecs/wm8804.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/sound/soc/codecs/wm8804.c
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+++ b/sound/soc/codecs/wm8804.c
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@@ -304,6 +304,7 @@ static int wm8804_hw_params(struct snd_p
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blen = 0x1;
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break;
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case 24:
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+ case 32:
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blen = 0x2;
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break;
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default:
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@@ -515,7 +516,7 @@ static const struct snd_soc_dai_ops wm88
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};
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#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
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- SNDRV_PCM_FMTBIT_S24_LE)
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+ SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
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#define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
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