mirror of https://github.com/hak5/openwrt.git
158 lines
3.0 KiB
Diff
158 lines
3.0 KiB
Diff
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
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@@ -15,6 +15,7 @@
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*/
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#include "qcom-ipq4019.dtsi"
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+#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
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@@ -29,6 +30,32 @@
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};
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soc {
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+ tcsr@194b000 {
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+ /* select hostmode */
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+ compatible = "qcom,tcsr";
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+ reg = <0x194b000 0x100>;
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+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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+ status = "ok";
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+ };
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+
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+ ess_tcsr@1953000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1953000 0x1000>;
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+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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+ };
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+
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+ tcsr@1949000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1949000 0x100>;
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+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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+ };
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+
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+ tcsr@1957000 {
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+ compatible = "qcom,tcsr";
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+ reg = <0x1957000 0x100>;
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+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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+ };
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+
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rng@22000 {
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status = "ok";
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};
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@@ -74,14 +101,6 @@
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pinctrl-names = "default";
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status = "ok";
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cs-gpios = <&tlmm 54 0>;
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-
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- mx25l25635e@0 {
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- #address-cells = <1>;
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- #size-cells = <1>;
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- reg = <0>;
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- compatible = "mx25l25635e";
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- spi-max-frequency = <24000000>;
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- };
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};
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serial@78af000 {
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@@ -110,6 +129,22 @@
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status = "ok";
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};
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+ mdio@90000 {
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+ status = "okay";
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+ };
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+
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+ ess-switch@c000000 {
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+ status = "okay";
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+ };
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+
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+ ess-psgmii@98000 {
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+ status = "okay";
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+ };
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+
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+ edma@c080000 {
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+ status = "okay";
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+ };
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+
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usb3_ss_phy: ssphy@9a000 {
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status = "ok";
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};
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--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
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@@ -18,5 +18,73 @@
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/ {
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model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
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+ compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019";
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+ memory {
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+ device_type = "memory";
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+ reg = <0x80000000 0x10000000>;
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+ };
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+};
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+
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+&blsp1_spi1 {
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+ mx25l25635f@0 {
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+ compatible = "mx25l25635f", "jedec,spi-nor";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0>;
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+ spi-max-frequency = <24000000>;
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+
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+ SBL1@0 {
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+ label = "SBL1";
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+ reg = <0x0 0x40000>;
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+ read-only;
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+ };
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+ MIBIB@40000 {
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+ label = "MIBIB";
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+ reg = <0x40000 0x20000>;
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+ read-only;
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+ };
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+ QSEE@60000 {
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+ label = "QSEE";
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+ reg = <0x60000 0x60000>;
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+ read-only;
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+ };
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+ CDT@c0000 {
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+ label = "CDT";
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+ reg = <0xc0000 0x10000>;
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+ read-only;
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+ };
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+ DDRPARAMS@d0000 {
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+ label = "DDRPARAMS";
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+ reg = <0xd0000 0x10000>;
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+ read-only;
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+ };
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+ APPSBLENV@e0000 {
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+ label = "APPSBLENV";
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+ reg = <0xe0000 0x10000>;
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+ read-only;
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+ };
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+ APPSBL@f0000 {
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+ label = "APPSBL";
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+ reg = <0xf0000 0x80000>;
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+ read-only;
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+ };
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+ ART@170000 {
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+ label = "ART";
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+ reg = <0x170000 0x10000>;
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+ read-only;
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+ };
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+ kernel@180000 {
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+ label = "kernel";
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+ reg = <0x180000 0x400000>;
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+ };
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+ rootfs@580000 {
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+ label = "rootfs";
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+ reg = <0x580000 0x1600000>;
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+ };
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+ firmware@180000 {
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+ label = "firmware";
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+ reg = <0x180000 0x1a00000>;
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+ };
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+ };
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};
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