openwrt/target/linux/generic/pending-4.19/180-net-phy-at803x-add-supp...

64 lines
2.1 KiB
Diff

From: Felix Fietkau <nbd@nbd.name>
Subject: net: phy: at803x: add support for AT8032
Like AT8030, this PHY needs the GPIO reset workaround
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -62,8 +62,10 @@
#define ATH8030_PHY_ID 0x004dd076
#define ATH8031_PHY_ID 0x004dd074
+#define ATH8032_PHY_ID 0x004dd023
#define ATH8035_PHY_ID 0x004dd072
#define AT803X_PHY_ID_MASK 0xffffffef
+#define AT8032_PHY_ID_MASK 0xffffffff
MODULE_DESCRIPTION("Atheros 803x PHY driver");
MODULE_AUTHOR("Matus Ujhelyi");
@@ -308,7 +310,7 @@ static void at803x_link_change_notify(st
struct at803x_priv *priv = phydev->priv;
/*
- * Conduct a hardware reset for AT8030 every time a link loss is
+ * Conduct a hardware reset for AT8030/2 every time a link loss is
* signalled. This is necessary to circumvent a hardware bug that
* occurs when the cable is unplugged while TX packets are pending
* in the FIFO. In such cases, the FIFO enters an error mode it
@@ -414,6 +416,24 @@ static struct phy_driver at803x_driver[]
.aneg_done = at803x_aneg_done,
.ack_interrupt = &at803x_ack_interrupt,
.config_intr = &at803x_config_intr,
+}, {
+ /* ATHEROS 8032 */
+ .phy_id = ATH8032_PHY_ID,
+ .name = "Atheros 8032 ethernet",
+ .phy_id_mask = AT8032_PHY_ID_MASK,
+ .probe = at803x_probe,
+ .config_init = at803x_config_init,
+ .link_change_notify = at803x_link_change_notify,
+ .set_wol = at803x_set_wol,
+ .get_wol = at803x_get_wol,
+ .suspend = at803x_suspend,
+ .resume = at803x_resume,
+ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_aneg = genphy_config_aneg,
+ .read_status = genphy_read_status,
+ .ack_interrupt = at803x_ack_interrupt,
+ .config_intr = at803x_config_intr,
} };
module_phy_driver(at803x_driver);
@@ -421,6 +441,7 @@ module_phy_driver(at803x_driver);
static struct mdio_device_id __maybe_unused atheros_tbl[] = {
{ ATH8030_PHY_ID, AT803X_PHY_ID_MASK },
{ ATH8031_PHY_ID, AT803X_PHY_ID_MASK },
+ { ATH8032_PHY_ID, AT8032_PHY_ID_MASK },
{ ATH8035_PHY_ID, AT803X_PHY_ID_MASK },
{ }
};