mirror of https://github.com/hak5/openwrt.git
437 lines
13 KiB
Diff
437 lines
13 KiB
Diff
From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Fri, 24 Jun 2016 22:16:01 +0200
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Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
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Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
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functions onto the GPIO pins. It does not support configuring individual
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pins but only whole groups. These groups may overlap, and still require
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the directions to be set correctly in the GPIO register. In addition the
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functions register controls other, not directly mux related functions.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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drivers/pinctrl/bcm63xx/Kconfig | 8 +
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drivers/pinctrl/bcm63xx/Makefile | 1 +
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drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
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3 files changed, 402 insertions(+)
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create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
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--- a/drivers/pinctrl/bcm63xx/Kconfig
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+++ b/drivers/pinctrl/bcm63xx/Kconfig
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@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
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select PINCONF
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select PINCTRL_BCM63XX
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select GENERIC_PINCONF
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+
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+config PINCTRL_BCM6358
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+ bool "BCM6358 pincontrol driver" if COMPILE_TEST
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+ select PINMUX
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+ select PINCONF
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+ select PINCTRL_BCM63XX
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+ select GENERIC_PINCONF
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+ select MFD_SYSCON
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--- a/drivers/pinctrl/bcm63xx/Makefile
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+++ b/drivers/pinctrl/bcm63xx/Makefile
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@@ -1,3 +1,4 @@
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obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
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obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
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obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
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+obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
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@@ -0,0 +1,393 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/bitops.h>
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+#include <linux/gpio.h>
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+#include <linux/gpio/driver.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/of.h>
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+#include <linux/of_gpio.h>
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+#include <linux/of_address.h>
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+#include <linux/slab.h>
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+#include <linux/regmap.h>
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+#include <linux/platform_device.h>
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+
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+#include <linux/pinctrl/pinconf.h>
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+#include <linux/pinctrl/pinconf-generic.h>
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+#include <linux/pinctrl/pinmux.h>
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+#include <linux/pinctrl/machine.h>
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+
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+#include "../core.h"
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+#include "../pinctrl-utils.h"
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+
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+#include "pinctrl-bcm63xx.h"
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+
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+/* GPIO_MODE register */
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+#define BCM6358_MODE_MUX_NONE 0
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+
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+/* overlays on gpio pins */
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+#define BCM6358_MODE_MUX_EBI_CS BIT(5)
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+#define BCM6358_MODE_MUX_UART1 BIT(6)
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+#define BCM6358_MODE_MUX_SPI_CS BIT(7)
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+#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
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+#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
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+#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
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+#define BCM6358_MODE_MUX_LED BIT(11)
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+#define BCM6358_MODE_MUX_UTOPIA BIT(12)
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+#define BCM6358_MODE_MUX_CLKRST BIT(13)
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+#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
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+#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
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+
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+#define BCM6358_NGPIO 40
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+
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+struct bcm6358_pingroup {
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+ const char *name;
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+ const unsigned * const pins;
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+ const unsigned num_pins;
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+
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+ const u16 mode_val;
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+
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+ /* non-GPIO function muxes require the gpio direction to be set */
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+ const u16 direction;
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+};
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+
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+struct bcm6358_function {
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+ const char *name;
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+ const char * const *groups;
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+ const unsigned num_groups;
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+};
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+
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+struct bcm6358_pinctrl {
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+ struct device *dev;
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+ struct pinctrl_dev *pctldev;
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+ struct pinctrl_desc desc;
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+
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+ struct regmap_field *overlays;
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+
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+ struct gpio_chip gpio[2];
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+};
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+
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+#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
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+ { \
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+ .number = a, \
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+ .name = b, \
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+ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
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+ BCM6358_MODE_MUX_##bit2 | \
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+ BCM6358_MODE_MUX_##bit3), \
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+ }
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+
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+static const struct pinctrl_pin_desc bcm6358_pins[] = {
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+ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
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+ PINCTRL_PIN(4, "gpio4"),
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+ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
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+ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
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+ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
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+ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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+ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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+ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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+ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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+ PINCTRL_PIN(16, "gpio16"),
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+ PINCTRL_PIN(17, "gpio17"),
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+ PINCTRL_PIN(18, "gpio18"),
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+ PINCTRL_PIN(19, "gpio19"),
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+ PINCTRL_PIN(20, "gpio20"),
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+ PINCTRL_PIN(21, "gpio21"),
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+ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
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+ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
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+ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
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+ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
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+ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
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+ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
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+ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
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+ PINCTRL_PIN(34, "gpio34"),
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+ PINCTRL_PIN(35, "gpio35"),
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+ PINCTRL_PIN(36, "gpio36"),
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+ PINCTRL_PIN(37, "gpio37"),
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+ PINCTRL_PIN(38, "gpio38"),
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+ PINCTRL_PIN(39, "gpio39"),
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+};
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+
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+static unsigned ebi_cs_grp_pins[] = { 30, 31 };
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+
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+static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
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+
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+static unsigned spi_cs_grp_pins[] = { 32, 33 };
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+
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+static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
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+
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+static unsigned serial_led_grp_pins[] = { 6, 7 };
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+
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+static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
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+
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+static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
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+
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+static unsigned utopia_grp_pins[] = {
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+ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
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+};
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+
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+static unsigned pwm_syn_clk_grp_pins[] = { 8 };
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+
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+static unsigned sys_irq_grp_pins[] = { 5 };
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+
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+#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
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+ { \
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+ .name = #n, \
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+ .pins = n##_pins, \
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+ .num_pins = ARRAY_SIZE(n##_pins), \
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+ .mode_val = BCM6358_MODE_MUX_##bit, \
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+ .direction = dir, \
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+ }
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+
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+static const struct bcm6358_pingroup bcm6358_groups[] = {
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+ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
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+ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
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+ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
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+ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
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+ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
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+ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
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+ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
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+ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
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+ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
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+ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
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+};
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+
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+static const char * const ebi_cs_groups[] = {
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+ "ebi_cs_grp"
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+};
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+
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+static const char * const uart1_groups[] = {
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+ "uart1_grp"
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+};
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+
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+static const char * const spi_cs_2_3_groups[] = {
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+ "spi_cs_2_3_grp"
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+};
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+
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+static const char * const async_modem_groups[] = {
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+ "async_modem_grp"
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+};
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+
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+static const char * const legacy_led_groups[] = {
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+ "legacy_led_grp",
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+};
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+
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+static const char * const serial_led_groups[] = {
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+ "serial_led_grp",
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+};
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+
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+static const char * const led_groups[] = {
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+ "led_grp",
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+};
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+
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+static const char * const clkrst_groups[] = {
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+ "clkrst_grp",
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+};
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+
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+static const char * const pwm_syn_clk_groups[] = {
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+ "pwm_syn_clk_grp",
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+};
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+
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+static const char * const sys_irq_groups[] = {
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+ "sys_irq_grp",
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+};
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+
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+#define BCM6358_FUN(n) \
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+ { \
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+ .name = #n, \
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+ .groups = n##_groups, \
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+ .num_groups = ARRAY_SIZE(n##_groups), \
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+ }
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+
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+static const struct bcm6358_function bcm6358_funcs[] = {
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+ BCM6358_FUN(ebi_cs),
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+ BCM6358_FUN(uart1),
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+ BCM6358_FUN(spi_cs_2_3),
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+ BCM6358_FUN(async_modem),
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+ BCM6358_FUN(legacy_led),
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+ BCM6358_FUN(serial_led),
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+ BCM6358_FUN(led),
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+ BCM6358_FUN(clkrst),
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+ BCM6358_FUN(pwm_syn_clk),
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+ BCM6358_FUN(sys_irq),
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+};
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+
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+static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
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+{
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+ return ARRAY_SIZE(bcm6358_groups);
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+}
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+
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+static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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+ unsigned group)
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+{
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+ return bcm6358_groups[group].name;
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+}
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+
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+static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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+ unsigned group, const unsigned **pins,
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+ unsigned *num_pins)
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+{
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+ *pins = bcm6358_groups[group].pins;
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+ *num_pins = bcm6358_groups[group].num_pins;
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+
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+ return 0;
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+}
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+
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+static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
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+{
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+ return ARRAY_SIZE(bcm6358_funcs);
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+}
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+
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+static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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+ unsigned selector)
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+{
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+ return bcm6358_funcs[selector].name;
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+}
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+
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+static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
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+ unsigned selector,
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+ const char * const **groups,
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+ unsigned * const num_groups)
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+{
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+ *groups = bcm6358_funcs[selector].groups;
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+ *num_groups = bcm6358_funcs[selector].num_groups;
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+
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+ return 0;
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+}
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+
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+static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
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+ unsigned selector, unsigned group)
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+{
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+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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+ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
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+ u32 val = grp->mode_val;
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+ u32 mask = val;
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+ unsigned pin;
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+
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+ for (pin = 0; pin < grp->num_pins; pin++)
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+ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
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+
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+ regmap_field_update_bits(pctl->overlays, mask, val);
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+
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+ for (pin = 0; pin < grp->num_pins; pin++) {
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+ int hw_gpio = bcm6358_pins[pin].number;
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+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
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+
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+ if (grp->direction & BIT(pin))
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+ gc->direction_output(gc, hw_gpio % 32, 0);
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+ else
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+ gc->direction_input(gc, hw_gpio % 32);
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+ }
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+
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+ return 0;
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+}
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+
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+static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
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+ struct pinctrl_gpio_range *range,
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+ unsigned offset)
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+{
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+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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+ u32 mask;
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+
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+ mask = (unsigned long)bcm6358_pins[offset].drv_data;
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+ if (!mask)
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+ return 0;
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+
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+ /* disable all functions using this pin */
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+ return regmap_field_update_bits(pctl->overlays, mask, 0);
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+}
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+
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+static struct pinctrl_ops bcm6358_pctl_ops = {
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+ .get_groups_count = bcm6358_pinctrl_get_group_count,
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+ .get_group_name = bcm6358_pinctrl_get_group_name,
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+ .get_group_pins = bcm6358_pinctrl_get_group_pins,
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+#ifdef CONFIG_OF
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+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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+ .dt_free_map = pinctrl_utils_free_map,
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+#endif
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+};
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+
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+static struct pinmux_ops bcm6358_pmx_ops = {
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+ .get_functions_count = bcm6358_pinctrl_get_func_count,
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+ .get_function_name = bcm6358_pinctrl_get_func_name,
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+ .get_function_groups = bcm6358_pinctrl_get_groups,
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+ .set_mux = bcm6358_pinctrl_set_mux,
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+ .gpio_request_enable = bcm6358_gpio_request_enable,
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+ .strict = true,
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+};
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+
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+static int bcm6358_pinctrl_probe(struct platform_device *pdev)
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+{
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+ struct bcm6358_pinctrl *pctl;
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+ struct regmap *mode;
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+ struct reg_field overlays = REG_FIELD(0, 0, 15);
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+
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+ if (pdev->dev.of_node)
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+ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
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+ "brcm,gpiomode");
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+ else
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+ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
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+
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+ if (IS_ERR(mode))
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+ return PTR_ERR(mode);
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+
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+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
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+ if (!pctl)
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+ return -ENOMEM;
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+
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+ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
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+ if (IS_ERR(pctl->overlays))
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+ return PTR_ERR(pctl->overlays);
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+
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+ /* disable all muxes by default */
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+ regmap_field_write(pctl->overlays, 0);
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+
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+ pctl->desc.name = dev_name(&pdev->dev);
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+ pctl->desc.owner = THIS_MODULE;
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+ pctl->desc.pctlops = &bcm6358_pctl_ops;
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+ pctl->desc.pmxops = &bcm6358_pmx_ops;
|
|
+
|
|
+ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
|
|
+ pctl->desc.pins = bcm6358_pins;
|
|
+
|
|
+ platform_set_drvdata(pdev, pctl);
|
|
+
|
|
+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
|
|
+ pctl->gpio, BCM6358_NGPIO);
|
|
+ if (IS_ERR(pctl->pctldev))
|
|
+ return PTR_ERR(pctl->pctldev);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id bcm6358_pinctrl_match[] = {
|
|
+ { .compatible = "brcm,bcm6358-pinctrl", },
|
|
+ { },
|
|
+};
|
|
+
|
|
+static struct platform_driver bcm6358_pinctrl_driver = {
|
|
+ .probe = bcm6358_pinctrl_probe,
|
|
+ .driver = {
|
|
+ .name = "bcm6358-pinctrl",
|
|
+ .of_match_table = bcm6358_pinctrl_match,
|
|
+ },
|
|
+};
|
|
+
|
|
+builtin_platform_driver(bcm6358_pinctrl_driver);
|