mirror of https://github.com/hak5/openwrt.git
182 lines
5.6 KiB
Diff
182 lines
5.6 KiB
Diff
From db656eb11aebb0d7e4b833f9b452503ddb1351f1 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
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Date: Fri, 23 Sep 2016 04:54:27 +0200
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Subject: [PATCH] i2c: bcm2835: Add support for Repeated Start Condition
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Documentation/i2c/i2c-protocol states that Combined transactions should
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separate messages with a Start bit and end the whole transaction with a
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Stop bit. This patch adds support for issuing only a Start between
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messages instead of a Stop followed by a Start.
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This implementation differs from downstream i2c-bcm2708 in 2 respects:
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- it uses an interrupt to detect that the transfer is active instead
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of using polling. There is no interrupt for Transfer Active, but by
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not prefilling the FIFO it's possible to use the TXW interrupt.
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- when resetting/disabling the controller between transfers it writes
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CLEAR to the control register instead of just zero.
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Using just zero gave many errors. This might be the reason why
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downstream had to disable this feature and make it available with a
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module parameter.
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I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel)
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and AT24C32 (eeprom) in parallel without problems.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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Acked-by: Eric Anholt <eric@anholt.net>
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---
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drivers/i2c/busses/i2c-bcm2835.c | 101 ++++++++++++++++++++++++---------------
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1 file changed, 63 insertions(+), 38 deletions(-)
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--- a/drivers/i2c/busses/i2c-bcm2835.c
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+++ b/drivers/i2c/busses/i2c-bcm2835.c
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@@ -63,6 +63,7 @@ struct bcm2835_i2c_dev {
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struct i2c_adapter adapter;
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struct completion completion;
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struct i2c_msg *curr_msg;
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+ int num_msgs;
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u32 msg_err;
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u8 *msg_buf;
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size_t msg_buf_remaining;
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@@ -110,6 +111,45 @@ static void bcm2835_drain_rxfifo(struct
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}
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/*
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+ * Repeated Start Condition (Sr)
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+ * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it
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+ * talks about reading from a slave with 10 bit address. This is achieved by
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+ * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then
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+ * issue a read.
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+ * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the
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+ * firmware actually does it using polling and says that it's a workaround for
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+ * a problem in the state machine.
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+ * It turns out that it is possible to use the TXW interrupt to know when the
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+ * transfer is active, provided the FIFO has not been prefilled.
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+ */
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+
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+static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev)
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+{
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+ u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN;
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+ struct i2c_msg *msg = i2c_dev->curr_msg;
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+ bool last_msg = (i2c_dev->num_msgs == 1);
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+
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+ if (!i2c_dev->num_msgs)
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+ return;
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+
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+ i2c_dev->num_msgs--;
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+ i2c_dev->msg_buf = msg->buf;
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+ i2c_dev->msg_buf_remaining = msg->len;
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+
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+ if (msg->flags & I2C_M_RD)
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+ c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
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+ else
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+ c |= BCM2835_I2C_C_INTT;
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+
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+ if (last_msg)
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+ c |= BCM2835_I2C_C_INTD;
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+
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+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
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+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
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+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
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+}
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+
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+/*
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* Note about I2C_C_CLEAR on error:
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* The I2C_C_CLEAR on errors will take some time to resolve -- if you were in
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* non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through
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@@ -151,6 +191,12 @@ static irqreturn_t bcm2835_i2c_isr(int t
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}
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bcm2835_fill_txfifo(i2c_dev);
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+
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+ if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) {
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+ i2c_dev->curr_msg++;
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+ bcm2835_i2c_start_transfer(i2c_dev);
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+ }
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+
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return IRQ_HANDLED;
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}
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@@ -175,30 +221,25 @@ complete:
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return IRQ_HANDLED;
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}
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-static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
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- struct i2c_msg *msg)
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+static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
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+ int num)
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{
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- u32 c;
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+ struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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unsigned long time_left;
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+ int i;
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- i2c_dev->curr_msg = msg;
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- i2c_dev->msg_buf = msg->buf;
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- i2c_dev->msg_buf_remaining = msg->len;
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- reinit_completion(&i2c_dev->completion);
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-
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
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+ for (i = 0; i < (num - 1); i++)
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+ if (msgs[i].flags & I2C_M_RD) {
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+ dev_warn_once(i2c_dev->dev,
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+ "only one read message supported, has to be last\n");
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+ return -EOPNOTSUPP;
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+ }
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- if (msg->flags & I2C_M_RD) {
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- c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
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- } else {
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- c = BCM2835_I2C_C_INTT;
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- bcm2835_fill_txfifo(i2c_dev);
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- }
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- c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN;
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+ i2c_dev->curr_msg = msgs;
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+ i2c_dev->num_msgs = num;
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+ reinit_completion(&i2c_dev->completion);
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
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+ bcm2835_i2c_start_transfer(i2c_dev);
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time_left = wait_for_completion_timeout(&i2c_dev->completion,
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BCM2835_I2C_TIMEOUT);
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@@ -209,31 +250,15 @@ static int bcm2835_i2c_xfer_msg(struct b
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return -ETIMEDOUT;
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}
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- if (likely(!i2c_dev->msg_err))
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- return 0;
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+ if (!i2c_dev->msg_err)
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+ return num;
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dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
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if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
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return -EREMOTEIO;
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- else
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- return -EIO;
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-}
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-
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-static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
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- int num)
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-{
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- struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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- int i;
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- int ret = 0;
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-
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- for (i = 0; i < num; i++) {
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- ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]);
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- if (ret)
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- break;
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- }
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- return ret ?: i;
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+ return -EIO;
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}
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static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
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