mirror of https://github.com/hak5/openwrt.git
691 lines
17 KiB
C
691 lines
17 KiB
C
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/*
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* Linux device driver for PCI based Prism54
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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*
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* Based on the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/firmware.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/completion.h>
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#include <net/mac80211.h>
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#include "p54.h"
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#include "p54pci.h"
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MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
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MODULE_DESCRIPTION("Prism54 PCI wireless driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("prism54pci");
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static struct pci_device_id p54p_table[] __devinitdata = {
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/* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3890) },
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/* 3COM 3CRWE154G72 Wireless LAN adapter */
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{ PCI_DEVICE(0x10b7, 0x6001) },
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/* Intersil PRISM Indigo Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3877) },
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/* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
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{ PCI_DEVICE(0x1260, 0x3886) },
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{ },
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};
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MODULE_DEVICE_TABLE(pci, p54p_table);
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static int p54p_upload_firmware(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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const struct firmware *fw_entry = NULL;
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__le32 reg;
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int err;
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u32 *data;
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u32 remains, left, device_addr;
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P54P_WRITE(int_enable, 0);
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P54P_READ(int_enable);
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udelay(10);
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reg = P54P_READ(ctrl_stat);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
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P54P_WRITE(ctrl_stat, reg);
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P54P_READ(ctrl_stat);
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udelay(10);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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mdelay(50);
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err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
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if (err) {
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printk(KERN_ERR "%s (prism54pci): cannot find firmware "
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"(isl3886)\n", pci_name(priv->pdev));
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return err;
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}
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p54_parse_firmware(dev, fw_entry);
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data = (u32 *) fw_entry->data;
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remains = fw_entry->size;
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device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
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while (remains) {
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u32 i = 0;
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left = min((u32)0x1000, remains);
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P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
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P54P_READ(int_enable);
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device_addr += 0x1000;
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while (i < left) {
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P54P_WRITE(direct_mem_win[i], *data++);
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i += sizeof(u32);
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}
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remains -= left;
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P54P_READ(int_enable);
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}
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release_firmware(fw_entry);
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reg = P54P_READ(ctrl_stat);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
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P54P_WRITE(ctrl_stat, reg);
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P54P_READ(ctrl_stat);
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udelay(10);
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reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
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P54P_WRITE(ctrl_stat, reg);
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wmb();
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udelay(10);
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return 0;
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}
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static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
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{
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struct p54p_priv *priv = (struct p54p_priv *) dev_id;
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__le32 reg;
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reg = P54P_READ(int_ident);
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P54P_WRITE(int_ack, reg);
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if (reg & P54P_READ(int_enable))
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complete(&priv->boot_comp);
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return IRQ_HANDLED;
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}
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static int p54p_read_eeprom(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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int err;
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struct p54_control_hdr *hdr;
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void *eeprom;
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dma_addr_t rx_mapping, tx_mapping;
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u16 alen;
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init_completion(&priv->boot_comp);
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err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
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IRQF_SHARED, "prism54pci", priv);
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if (err) {
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printk(KERN_ERR "%s (prism54pci): failed to register IRQ handler\n",
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pci_name(priv->pdev));
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return err;
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}
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eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
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if (!eeprom) {
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printk(KERN_ERR "%s (prism54pci): no memory for eeprom!\n",
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pci_name(priv->pdev));
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err = -ENOMEM;
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goto out;
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}
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memset(priv->ring_control, 0, sizeof(*priv->ring_control));
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P54P_WRITE(ring_control_base, priv->ring_control_dma);
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P54P_READ(ring_control_base);
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udelay(10);
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
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P54P_READ(int_enable);
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udelay(10);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
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printk(KERN_ERR "%s (prism54pci): Cannot boot firmware!\n",
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pci_name(priv->pdev));
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err = -EINVAL;
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goto out;
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}
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
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P54P_READ(int_enable);
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hdr = eeprom + 0x2010;
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p54_fill_eeprom_readback(hdr);
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hdr->req_id = cpu_to_le32(priv->common.rx_start);
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rx_mapping = pci_map_single(priv->pdev, eeprom,
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0x2010, PCI_DMA_FROMDEVICE);
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tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
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EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
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priv->ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
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priv->ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
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priv->ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
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priv->ring_control->tx_data[0].device_addr = hdr->req_id;
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priv->ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
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priv->ring_control->host_idx[2] = cpu_to_le32(1);
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priv->ring_control->host_idx[1] = cpu_to_le32(1);
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wmb();
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mdelay(100);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
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wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
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pci_unmap_single(priv->pdev, tx_mapping,
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EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
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pci_unmap_single(priv->pdev, rx_mapping,
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0x2010, PCI_DMA_FROMDEVICE);
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alen = le16_to_cpu(priv->ring_control->rx_mgmt[0].len);
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if (le32_to_cpu(priv->ring_control->device_idx[2]) != 1 ||
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alen < 0x10) {
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printk(KERN_ERR "%s (prism54pci): Cannot read eeprom!\n",
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pci_name(priv->pdev));
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err = -EINVAL;
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goto out;
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}
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p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
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out:
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kfree(eeprom);
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P54P_WRITE(int_enable, 0);
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P54P_READ(int_enable);
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udelay(10);
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free_irq(priv->pdev->irq, priv);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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return err;
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}
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static void p54p_refill_rx_ring(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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u32 limit, host_idx, idx;
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host_idx = le32_to_cpu(priv->ring_control->host_idx[0]);
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limit = host_idx;
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limit -= le32_to_cpu(priv->ring_control->device_idx[0]);
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limit = ARRAY_SIZE(priv->ring_control->rx_data) - limit;
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idx = host_idx % ARRAY_SIZE(priv->ring_control->rx_data);
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while (limit-- > 1) {
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struct p54p_desc *desc = &priv->ring_control->rx_data[idx];
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if (!desc->host_addr) {
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struct sk_buff *skb;
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dma_addr_t mapping;
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skb = dev_alloc_skb(MAX_RX_SIZE);
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if (!skb)
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break;
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mapping = pci_map_single(priv->pdev,
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skb_tail_pointer(skb),
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MAX_RX_SIZE,
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PCI_DMA_FROMDEVICE);
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desc->host_addr = cpu_to_le32(mapping);
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desc->device_addr = 0; // FIXME: necessary?
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desc->len = cpu_to_le16(MAX_RX_SIZE);
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desc->flags = 0;
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priv->rx_buf[idx] = skb;
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}
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idx++;
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host_idx++;
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idx %= ARRAY_SIZE(priv->ring_control->rx_data);
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}
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wmb();
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priv->ring_control->host_idx[0] = cpu_to_le32(host_idx);
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}
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static irqreturn_t p54p_interrupt(int irq, void *dev_id)
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{
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struct ieee80211_hw *dev = dev_id;
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struct p54p_priv *priv = dev->priv;
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__le32 reg;
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spin_lock(&priv->lock);
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reg = P54P_READ(int_ident);
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if (unlikely(reg == 0xFFFFFFFF)) {
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spin_unlock(&priv->lock);
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return IRQ_HANDLED;
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}
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P54P_WRITE(int_ack, reg);
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reg &= P54P_READ(int_enable);
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if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
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struct p54p_desc *desc;
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u32 idx, i;
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i = priv->tx_idx;
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i %= ARRAY_SIZE(priv->ring_control->tx_data);
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priv->tx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[1]);
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idx %= ARRAY_SIZE(priv->ring_control->tx_data);
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while (i != idx) {
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desc = &priv->ring_control->tx_data[i];
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if (priv->tx_buf[i]) {
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kfree(priv->tx_buf[i]);
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priv->tx_buf[i] = NULL;
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}
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pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
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le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
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desc->host_addr = 0;
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desc->device_addr = 0;
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desc->len = 0;
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desc->flags = 0;
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i++;
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i %= ARRAY_SIZE(priv->ring_control->tx_data);
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}
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i = priv->rx_idx;
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i %= ARRAY_SIZE(priv->ring_control->rx_data);
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priv->rx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[0]);
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idx %= ARRAY_SIZE(priv->ring_control->rx_data);
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while (i != idx) {
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u16 len;
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struct sk_buff *skb;
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desc = &priv->ring_control->rx_data[i];
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len = le16_to_cpu(desc->len);
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skb = priv->rx_buf[i];
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skb_put(skb, len);
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if (p54_rx(dev, skb)) {
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pci_unmap_single(priv->pdev,
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le32_to_cpu(desc->host_addr),
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MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
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priv->rx_buf[i] = NULL;
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desc->host_addr = 0;
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} else {
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skb_trim(skb, 0);
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desc->len = cpu_to_le16(MAX_RX_SIZE);
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}
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i++;
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i %= ARRAY_SIZE(priv->ring_control->rx_data);
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}
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p54p_refill_rx_ring(dev);
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wmb();
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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} else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
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complete(&priv->boot_comp);
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spin_unlock(&priv->lock);
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return reg ? IRQ_HANDLED : IRQ_NONE;
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}
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static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
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size_t len, int free_on_tx)
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{
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struct p54p_priv *priv = dev->priv;
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unsigned long flags;
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struct p54p_desc *desc;
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dma_addr_t mapping;
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u32 device_idx, idx, i;
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spin_lock_irqsave(&priv->lock, flags);
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device_idx = le32_to_cpu(priv->ring_control->device_idx[1]);
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idx = le32_to_cpu(priv->ring_control->host_idx[1]);
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i = idx % ARRAY_SIZE(priv->ring_control->tx_data);
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mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
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desc = &priv->ring_control->tx_data[i];
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desc->host_addr = cpu_to_le32(mapping);
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desc->device_addr = data->req_id;
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desc->len = cpu_to_le16(len);
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desc->flags = 0;
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wmb();
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priv->ring_control->host_idx[1] = cpu_to_le32(idx + 1);
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if (free_on_tx)
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priv->tx_buf[i] = data;
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spin_unlock_irqrestore(&priv->lock, flags);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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P54P_READ(dev_int);
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/* FIXME: unlikely to happen because the device usually runs out of
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memory before we fill the ring up, but we can make it impossible */
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if (idx - device_idx > ARRAY_SIZE(priv->ring_control->tx_data) - 2)
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printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
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}
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static int p54p_open(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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int err;
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init_completion(&priv->boot_comp);
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err = request_irq(priv->pdev->irq, &p54p_interrupt,
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IRQF_SHARED, "prism54pci", dev);
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if (err) {
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printk(KERN_ERR "%s: failed to register IRQ handler\n",
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wiphy_name(dev->wiphy));
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return err;
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}
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memset(priv->ring_control, 0, sizeof(*priv->ring_control));
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priv->rx_idx = priv->tx_idx = 0;
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p54p_refill_rx_ring(dev);
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p54p_upload_firmware(dev);
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P54P_WRITE(ring_control_base, priv->ring_control_dma);
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P54P_READ(ring_control_base);
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wmb();
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udelay(10);
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
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P54P_READ(int_enable);
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wmb();
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udelay(10);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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P54P_READ(dev_int);
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if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
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printk(KERN_ERR "%s: Cannot boot firmware!\n",
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wiphy_name(dev->wiphy));
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free_irq(priv->pdev->irq, dev);
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return -ETIMEDOUT;
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}
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P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
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P54P_READ(int_enable);
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wmb();
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udelay(10);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
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P54P_READ(dev_int);
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wmb();
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udelay(10);
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return 0;
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}
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static void p54p_stop(struct ieee80211_hw *dev)
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{
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struct p54p_priv *priv = dev->priv;
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unsigned int i;
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struct p54p_desc *desc;
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P54P_WRITE(int_enable, 0);
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P54P_READ(int_enable);
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udelay(10);
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free_irq(priv->pdev->irq, dev);
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P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
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for (i = 0; i < ARRAY_SIZE(priv->rx_buf); i++) {
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desc = &priv->ring_control->rx_data[i];
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if (desc->host_addr)
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pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
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MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
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kfree_skb(priv->rx_buf[i]);
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priv->rx_buf[i] = NULL;
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}
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|
|
for (i = 0; i < ARRAY_SIZE(priv->tx_buf); i++) {
|
|
desc = &priv->ring_control->tx_data[i];
|
|
if (desc->host_addr)
|
|
pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
|
|
le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
|
|
|
|
kfree(priv->tx_buf[i]);
|
|
priv->tx_buf[i] = NULL;
|
|
}
|
|
|
|
memset(priv->ring_control, 0, sizeof(*priv->ring_control));
|
|
}
|
|
|
|
static int __devinit p54p_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
struct p54p_priv *priv;
|
|
struct ieee80211_hw *dev;
|
|
unsigned long mem_addr, mem_len;
|
|
int err;
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err) {
|
|
printk(KERN_ERR "%s (prism54pci): Cannot enable new PCI device\n",
|
|
pci_name(pdev));
|
|
return err;
|
|
}
|
|
|
|
mem_addr = pci_resource_start(pdev, 0);
|
|
mem_len = pci_resource_len(pdev, 0);
|
|
if (mem_len < sizeof(struct p54p_csr)) {
|
|
printk(KERN_ERR "%s (prism54pci): Too short PCI resources\n",
|
|
pci_name(pdev));
|
|
pci_disable_device(pdev);
|
|
return err;
|
|
}
|
|
|
|
err = pci_request_regions(pdev, "prism54pci");
|
|
if (err) {
|
|
printk(KERN_ERR "%s (prism54pci): Cannot obtain PCI resources\n",
|
|
pci_name(pdev));
|
|
return err;
|
|
}
|
|
|
|
if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
|
|
pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
|
|
printk(KERN_ERR "%s (prism54pci): No suitable DMA available\n",
|
|
pci_name(pdev));
|
|
goto err_free_reg;
|
|
}
|
|
|
|
pci_set_master(pdev);
|
|
pci_try_set_mwi(pdev);
|
|
|
|
pci_write_config_byte(pdev, 0x40, 0);
|
|
pci_write_config_byte(pdev, 0x41, 0);
|
|
|
|
dev = p54_init_common(sizeof(*priv));
|
|
if (!dev) {
|
|
printk(KERN_ERR "%s (prism54pci): ieee80211 alloc failed\n",
|
|
pci_name(pdev));
|
|
err = -ENOMEM;
|
|
goto err_free_reg;
|
|
}
|
|
|
|
priv = dev->priv;
|
|
priv->pdev = pdev;
|
|
|
|
SET_IEEE80211_DEV(dev, &pdev->dev);
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
priv->map = ioremap(mem_addr, mem_len);
|
|
if (!priv->map) {
|
|
printk(KERN_ERR "%s (prism54pci): Cannot map device memory\n",
|
|
pci_name(pdev));
|
|
err = -EINVAL; // TODO: use a better error code?
|
|
goto err_free_dev;
|
|
}
|
|
|
|
priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
|
|
&priv->ring_control_dma);
|
|
if (!priv->ring_control) {
|
|
printk(KERN_ERR "%s (prism54pci): Cannot allocate rings\n",
|
|
pci_name(pdev));
|
|
err = -ENOMEM;
|
|
goto err_iounmap;
|
|
}
|
|
memset(priv->ring_control, 0, sizeof(*priv->ring_control));
|
|
|
|
err = p54p_upload_firmware(dev);
|
|
if (err)
|
|
goto err_free_desc;
|
|
|
|
err = p54p_read_eeprom(dev);
|
|
if (err)
|
|
goto err_free_desc;
|
|
|
|
priv->common.open = p54p_open;
|
|
priv->common.stop = p54p_stop;
|
|
priv->common.tx = p54p_tx;
|
|
|
|
spin_lock_init(&priv->lock);
|
|
|
|
err = ieee80211_register_hw(dev);
|
|
if (err) {
|
|
printk(KERN_ERR "%s (prism54pci): Cannot register netdevice\n",
|
|
pci_name(pdev));
|
|
goto err_free_common;
|
|
}
|
|
|
|
printk(KERN_INFO "%s: hwaddr " MAC_FMT ", isl38%02x\n",
|
|
wiphy_name(dev->wiphy), MAC_ARG(dev->wiphy->perm_addr),
|
|
priv->common.version);
|
|
|
|
return 0;
|
|
|
|
err_free_common:
|
|
p54_free_common(dev);
|
|
|
|
err_free_desc:
|
|
pci_free_consistent(pdev, sizeof(*priv->ring_control),
|
|
priv->ring_control, priv->ring_control_dma);
|
|
|
|
err_iounmap:
|
|
iounmap(priv->map);
|
|
|
|
err_free_dev:
|
|
pci_set_drvdata(pdev, NULL);
|
|
ieee80211_free_hw(dev);
|
|
|
|
err_free_reg:
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
return err;
|
|
}
|
|
|
|
static void __devexit p54p_remove(struct pci_dev *pdev)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv;
|
|
|
|
if (!dev)
|
|
return;
|
|
|
|
ieee80211_unregister_hw(dev);
|
|
priv = dev->priv;
|
|
pci_free_consistent(pdev, sizeof(*priv->ring_control),
|
|
priv->ring_control, priv->ring_control_dma);
|
|
p54_free_common(dev);
|
|
iounmap(priv->map);
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
ieee80211_free_hw(dev);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv = dev->priv;
|
|
|
|
if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
|
|
ieee80211_stop_queues(dev);
|
|
p54p_stop(dev);
|
|
}
|
|
|
|
pci_save_state(pdev);
|
|
pci_set_power_state(pdev, pci_choose_state(pdev, state));
|
|
return 0;
|
|
}
|
|
|
|
static int p54p_resume(struct pci_dev *pdev)
|
|
{
|
|
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
|
|
struct p54p_priv *priv = dev->priv;
|
|
|
|
pci_set_power_state(pdev, PCI_D0);
|
|
pci_restore_state(pdev);
|
|
|
|
if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
|
|
p54p_open(dev);
|
|
ieee80211_start_queues(dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PM */
|
|
|
|
static struct pci_driver p54p_driver = {
|
|
.name = "prism54pci",
|
|
.id_table = p54p_table,
|
|
.probe = p54p_probe,
|
|
.remove = __devexit_p(p54p_remove),
|
|
#ifdef CONFIG_PM
|
|
.suspend = p54p_suspend,
|
|
.resume = p54p_resume,
|
|
#endif /* CONFIG_PM */
|
|
};
|
|
|
|
static int __init p54p_init(void)
|
|
{
|
|
return pci_register_driver(&p54p_driver);
|
|
}
|
|
|
|
static void __exit p54p_exit(void)
|
|
{
|
|
pci_unregister_driver(&p54p_driver);
|
|
}
|
|
|
|
module_init(p54p_init);
|
|
module_exit(p54p_exit);
|