mirror of https://github.com/hak5/openwrt.git
368 lines
7.0 KiB
Diff
368 lines
7.0 KiB
Diff
From 7e77aa188a7a7c4391856a9e5ef5ef58f769e679 Mon Sep 17 00:00:00 2001
|
|
From: Jonas Gorski <jogo@openwrt.org>
|
|
Date: Sun, 9 Aug 2015 13:02:38 +0200
|
|
Subject: [PATCH] ARM: qcom: add Netgear Nighthawk X4 R7500 device tree
|
|
|
|
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
|
---
|
|
arch/arm/boot/dts/Makefile | 1 +
|
|
arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 370 +++++++++++++++++++++++++++++++
|
|
2 files changed, 371 insertions(+)
|
|
create mode 100644 arch/arm/boot/dts/qcom-ipq8064-r7500.dts
|
|
|
|
--- a/arch/arm/boot/dts/Makefile
|
|
+++ b/arch/arm/boot/dts/Makefile
|
|
@@ -452,6 +452,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
|
|
qcom-apq8084-mtp.dtb \
|
|
qcom-ipq8064-ap148.dtb \
|
|
qcom-ipq8064-db149.dtb \
|
|
+ qcom-ipq8064-r7500.dtb \
|
|
qcom-msm8660-surf.dtb \
|
|
qcom-msm8960-cdp.dtb \
|
|
qcom-msm8974-sony-xperia-honami.dtb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
|
|
@@ -0,0 +1,342 @@
|
|
+#include "qcom-ipq8064-v1.0.dtsi"
|
|
+
|
|
+#include <dt-bindings/input/input.h>
|
|
+
|
|
+/ {
|
|
+ model = "Netgear Nighthawk X4 R7500";
|
|
+ compatible = "netgear,r7500", "qcom,ipq8064";
|
|
+
|
|
+ memory@0 {
|
|
+ reg = <0x42000000 0xe000000>;
|
|
+ device_type = "memory";
|
|
+ };
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+ rsvd@41200000 {
|
|
+ reg = <0x41200000 0x300000>;
|
|
+ no-map;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart4;
|
|
+ mdio-gpio0 = &mdio0;
|
|
+ };
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "rootfstype=squashfs noinitrd";
|
|
+ linux,stdout-path = "serial0:115200n8";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ pinmux@800000 {
|
|
+ i2c4_pins: i2c4_pinmux {
|
|
+ pins = "gpio12", "gpio13";
|
|
+ function = "gsbi4";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mdio0_pins: mdio0_pins {
|
|
+ mux {
|
|
+ pins = "gpio0", "gpio1";
|
|
+ function = "gpio";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii2_pins: rgmii2_pins {
|
|
+ mux {
|
|
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
|
|
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
|
|
+ function = "rgmii2";
|
|
+ drive-strength = <8>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gsbi@16300000 {
|
|
+ qcom,mode = <GSBI_PROT_I2C_UART>;
|
|
+ status = "ok";
|
|
+ serial@16340000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+ /*
|
|
+ * The i2c device on gsbi4 should not be enabled.
|
|
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
|
|
+ * RPM usage. Turning this on in kernel manifests as
|
|
+ * i2c failure for the RPM.
|
|
+ */
|
|
+ };
|
|
+
|
|
+ sata-phy@1b400000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ sata@29000000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8800 { /* USB3 port 1 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@100f8830 { /* USB3 port 1 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8800 { /* USB3 port 0 HS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ phy@110f8830 { /* USB3 port 0 SS phy */
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@0 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ usb30@1 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie0: pci@1b500000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ pcie1: pci@1b700000 {
|
|
+ status = "ok";
|
|
+ };
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ qcadata@0 {
|
|
+ label = "qcadata";
|
|
+ reg = <0x0000000 0x0c80000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBL@c80000 {
|
|
+ label = "APPSBL";
|
|
+ reg = <0x0c80000 0x0500000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ APPSBLENV@1180000 {
|
|
+ label = "APPSBLENV";
|
|
+ reg = <0x1180000 0x0080000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ art: art@1200000 {
|
|
+ label = "art";
|
|
+ reg = <0x1200000 0x0140000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ kernel@1340000 {
|
|
+ label = "kernel";
|
|
+ reg = <0x1340000 0x0200000>;
|
|
+ };
|
|
+
|
|
+ ubi@1540000 {
|
|
+ label = "ubi";
|
|
+ reg = <0x1540000 0x1800000>;
|
|
+ };
|
|
+
|
|
+ netgear@2d40000 {
|
|
+ label = "netgear";
|
|
+ reg = <0x2d40000 0x0c00000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ reserve@3940000 {
|
|
+ label = "reserve";
|
|
+ reg = <0x3940000 0x46c0000>;
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ firmware@1340000 {
|
|
+ label = "firmware";
|
|
+ reg = <0x1340000 0x1a00000>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ mdio0: mdio {
|
|
+ compatible = "virtual,mdio-gpio";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
|
|
+ pinctrl-0 = <&mdio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ phy0: ethernet-phy@0 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <0>;
|
|
+ qca,ar8327-initvals = <
|
|
+ 0x00004 0x7600000 /* PAD0_MODE */
|
|
+ 0x00008 0x1000000 /* PAD5_MODE */
|
|
+ 0x0000c 0x80 /* PAD6_MODE */
|
|
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
|
|
+ 0x000e0 0xc74164de /* SGMII_CTRL */
|
|
+ 0x0007c 0x4e /* PORT0_STATUS */
|
|
+ 0x00094 0x4e /* PORT6_STATUS */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ device_type = "ethernet-phy";
|
|
+ reg = <4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac1: ethernet@37200000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "rgmii";
|
|
+ qcom,id = <1>;
|
|
+
|
|
+ pinctrl-0 = <&rgmii2_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ mtd-mac-address = <&art 6>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac2: ethernet@37400000 {
|
|
+ status = "ok";
|
|
+ phy-mode = "sgmii";
|
|
+ qcom,id = <2>;
|
|
+
|
|
+ mtd-mac-address = <&art 0>;
|
|
+
|
|
+ fixed-link {
|
|
+ speed = <1000>;
|
|
+ full-duplex;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+
|
|
+ wifi {
|
|
+ label = "wifi";
|
|
+ gpios = <&qcom_pinmux 6 1>;
|
|
+ linux,code = <KEY_WLAN>;
|
|
+ };
|
|
+
|
|
+ reset {
|
|
+ label = "reset";
|
|
+ gpios = <&qcom_pinmux 54 1>;
|
|
+ linux,code = <KEY_RESTART>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "wps";
|
|
+ gpios = <&qcom_pinmux 65 1>;
|
|
+ linux,code = <KEY_WPS_BUTTON>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ compatible = "gpio-leds";
|
|
+
|
|
+ usb1 {
|
|
+ label = "r7500:amber:usb1";
|
|
+ gpios = <&qcom_pinmux 7 0>;
|
|
+ };
|
|
+
|
|
+ usb3 {
|
|
+ label = "r7500:amber:usb3";
|
|
+ gpios = <&qcom_pinmux 8 0>;
|
|
+ };
|
|
+
|
|
+ status {
|
|
+ label = "r7500:amber:status";
|
|
+ gpios = <&qcom_pinmux 9 0>;
|
|
+ };
|
|
+
|
|
+ internet {
|
|
+ label = "r7500:white:internet";
|
|
+ gpios = <&qcom_pinmux 22 0>;
|
|
+ };
|
|
+
|
|
+ wan {
|
|
+ label = "r7500:white:wan";
|
|
+ gpios = <&qcom_pinmux 23 0>;
|
|
+ };
|
|
+
|
|
+ wps {
|
|
+ label = "r7500:white:wps";
|
|
+ gpios = <&qcom_pinmux 24 0>;
|
|
+ };
|
|
+
|
|
+ esata {
|
|
+ label = "r7500:white:esata";
|
|
+ gpios = <&qcom_pinmux 26 0>;
|
|
+ };
|
|
+
|
|
+ power {
|
|
+ label = "r7500:white:power";
|
|
+ gpios = <&qcom_pinmux 53 0>;
|
|
+ default-state = "on";
|
|
+ };
|
|
+
|
|
+ rfkill {
|
|
+ label = "r7500:white:rfkill";
|
|
+ gpios = <&qcom_pinmux 64 0>;
|
|
+ };
|
|
+
|
|
+ wifi5g {
|
|
+ label = "r7500:white:wifi5g";
|
|
+ gpios = <&qcom_pinmux 67 0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|