mirror of https://github.com/hak5/openwrt.git
49 lines
1.8 KiB
Diff
49 lines
1.8 KiB
Diff
From 1b6ee2ac8f1d55cb7ceeaa606e3d4868cfde363d Mon Sep 17 00:00:00 2001
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From: Simon Maes <simonn.maes@gmail.com>
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Date: Mon, 29 Aug 2016 21:11:01 +0200
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Subject: [PATCH] Fixes i2c_bcm2708: Write to FIFO correctly - v2 (#1574)
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* i2c: fix i2c_bcm2708: Clear FIFO before sending data
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Make sure FIFO gets cleared before trying to send
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data in case of a repeated start (COMBINED=Y).
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* i2c: fix i2c_bcm2708: Only write to FIFO when not full
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Check if FIFO can accept data before writing.
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To avoid a peripheral read on the last iteration of a loop,
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both bcm2708_bsc_fifo_fill and ~drain are changed as well.
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---
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drivers/i2c/busses/i2c-bcm2708.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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--- a/drivers/i2c/busses/i2c-bcm2708.c
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+++ b/drivers/i2c/busses/i2c-bcm2708.c
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@@ -115,13 +115,13 @@ static inline void bcm2708_bsc_reset(str
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static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi)
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{
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- while ((bcm2708_rd(bi, BSC_S) & BSC_S_RXD) && (bi->pos < bi->msg->len))
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+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_RXD))
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bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO);
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}
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static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi)
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{
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- while ((bcm2708_rd(bi, BSC_S) & BSC_S_TXD) && (bi->pos < bi->msg->len))
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+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_TXD))
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bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
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}
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@@ -155,6 +155,10 @@ static inline int bcm2708_bsc_setup(stru
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if ( (bi->nmsgs > 1) &&
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!(bi->msg[0].flags & I2C_M_RD) && (bi->msg[1].flags & I2C_M_RD) &&
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(bi->msg[0].addr == bi->msg[1].addr) && (bi->msg[0].len <= 16)) {
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+
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+ /* Clear FIFO */
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+ bcm2708_wr(bi, BSC_C, BSC_C_CLEAR_1);
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+
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/* Fill FIFO with entire write message (16 byte FIFO) */
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while (bi->pos < bi->msg->len) {
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bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
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