mirror of https://github.com/hak5/openwrt.git
520 lines
18 KiB
Diff
520 lines
18 KiB
Diff
From 64f2da0496d51f7260e18aeed6e72ed09fec7b00 Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Wed, 30 Dec 2015 12:25:44 -0800
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Subject: [PATCH] drm/vc4: Add support for YUV planes.
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This supports 420 and 422 subsampling with 2 or 3 planes, tested with
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modetest. It doesn't set up chroma subsampling position (which it
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appears KMS doesn't deal with yet).
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The LBM memory is overallocated in many cases, but apparently the docs
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aren't quite correct and I'll probably need to look at the hardware
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source to really figure it out.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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(cherry picked from commit fc04023fafecf19ebd09278d8d67dc5ed1f68b46)
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 256 +++++++++++++++++++++++++++++++---------
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drivers/gpu/drm/vc4/vc4_regs.h | 56 ++++++++-
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2 files changed, 253 insertions(+), 59 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -54,15 +54,19 @@ struct vc4_plane_state {
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/* Clipped coordinates of the plane on the display. */
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int crtc_x, crtc_y, crtc_w, crtc_h;
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/* Clipped area being scanned from in the FB. */
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- u32 src_x, src_y, src_w, src_h;
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+ u32 src_x, src_y;
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- enum vc4_scaling_mode x_scaling, y_scaling;
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+ u32 src_w[2], src_h[2];
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+
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+ /* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */
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+ enum vc4_scaling_mode x_scaling[2], y_scaling[2];
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bool is_unity;
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+ bool is_yuv;
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/* Offset to start scanning out from the start of the plane's
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* BO.
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*/
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- u32 offset;
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+ u32 offsets[3];
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/* Our allocation in LBM for temporary storage during scaling. */
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struct drm_mm_node lbm;
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@@ -79,6 +83,7 @@ static const struct hvs_format {
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u32 hvs; /* HVS_FORMAT_* */
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u32 pixel_order;
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bool has_alpha;
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+ bool flip_cbcr;
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} hvs_formats[] = {
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{
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.drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
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@@ -104,6 +109,32 @@ static const struct hvs_format {
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.drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
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.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
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},
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+ {
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+ .drm = DRM_FORMAT_YUV422,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YVU422,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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+ .flip_cbcr = true,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YUV420,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YVU420,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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+ .flip_cbcr = true,
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+ },
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+ {
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+ .drm = DRM_FORMAT_NV12,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_NV16,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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+ },
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};
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static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
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@@ -219,11 +250,11 @@ static void vc4_dlist_write(struct vc4_p
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*
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* This is a replication of a table from the spec.
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*/
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-static u32 vc4_get_scl_field(struct drm_plane_state *state)
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+static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)
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{
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struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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- switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
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+ switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {
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case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
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return SCALER_CTL0_SCL_H_PPF_V_PPF;
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case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
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@@ -254,9 +285,16 @@ static int vc4_plane_setup_clipping_and_
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struct drm_plane *plane = state->plane;
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struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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struct drm_framebuffer *fb = state->fb;
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+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
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u32 subpixel_src_mask = (1 << 16) - 1;
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+ u32 format = fb->pixel_format;
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+ int num_planes = drm_format_num_planes(format);
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+ u32 h_subsample = 1;
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+ u32 v_subsample = 1;
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+ int i;
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- vc4_state->offset = fb->offsets[0];
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+ for (i = 0; i < num_planes; i++)
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+ vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
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/* We don't support subpixel source positioning for scaling. */
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if ((state->src_x & subpixel_src_mask) ||
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@@ -268,20 +306,48 @@ static int vc4_plane_setup_clipping_and_
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vc4_state->src_x = state->src_x >> 16;
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vc4_state->src_y = state->src_y >> 16;
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- vc4_state->src_w = state->src_w >> 16;
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- vc4_state->src_h = state->src_h >> 16;
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+ vc4_state->src_w[0] = state->src_w >> 16;
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+ vc4_state->src_h[0] = state->src_h >> 16;
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vc4_state->crtc_x = state->crtc_x;
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vc4_state->crtc_y = state->crtc_y;
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vc4_state->crtc_w = state->crtc_w;
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vc4_state->crtc_h = state->crtc_h;
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- vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
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- vc4_state->crtc_w);
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- vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
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- vc4_state->crtc_h);
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- vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
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- vc4_state->y_scaling == VC4_SCALING_NONE);
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+ vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
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+ vc4_state->crtc_w);
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+ vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
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+ vc4_state->crtc_h);
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+
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+ if (num_planes > 1) {
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+ vc4_state->is_yuv = true;
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+
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+ h_subsample = drm_format_horz_chroma_subsampling(format);
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+ v_subsample = drm_format_vert_chroma_subsampling(format);
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+ vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample;
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+ vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample;
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+
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+ vc4_state->x_scaling[1] =
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+ vc4_get_scaling_mode(vc4_state->src_w[1],
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+ vc4_state->crtc_w);
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+ vc4_state->y_scaling[1] =
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+ vc4_get_scaling_mode(vc4_state->src_h[1],
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+ vc4_state->crtc_h);
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+
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+ /* YUV conversion requires that scaling be enabled,
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+ * even on a plane that's otherwise 1:1. Choose TPZ
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+ * for simplicity.
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+ */
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+ if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
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+ vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
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+ if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
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+ vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
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+ }
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+
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+ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
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+ vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
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+ vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
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+ vc4_state->y_scaling[1] == VC4_SCALING_NONE);
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/* No configuring scaling on the cursor plane, since it gets
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non-vblank-synced updates, and scaling requires requires
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@@ -294,16 +360,27 @@ static int vc4_plane_setup_clipping_and_
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* support negative y, and negative x wastes bandwidth.
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*/
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if (vc4_state->crtc_x < 0) {
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- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
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- 0) *
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- -vc4_state->crtc_x);
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- vc4_state->src_w += vc4_state->crtc_x;
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+ for (i = 0; i < num_planes; i++) {
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+ u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
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+ u32 subs = ((i == 0) ? 1 : h_subsample);
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+
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+ vc4_state->offsets[i] += (cpp *
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+ (-vc4_state->crtc_x) / subs);
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+ }
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+ vc4_state->src_w[0] += vc4_state->crtc_x;
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+ vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample;
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vc4_state->crtc_x = 0;
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}
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if (vc4_state->crtc_y < 0) {
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- vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
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- vc4_state->src_h += vc4_state->crtc_y;
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+ for (i = 0; i < num_planes; i++) {
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+ u32 subs = ((i == 0) ? 1 : v_subsample);
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+
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+ vc4_state->offsets[i] += (fb->pitches[i] *
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+ (-vc4_state->crtc_y) / subs);
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+ }
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+ vc4_state->src_h[0] += vc4_state->crtc_y;
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+ vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample;
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vc4_state->crtc_y = 0;
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}
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@@ -344,15 +421,23 @@ static u32 vc4_lbm_size(struct drm_plane
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/* This is the worst case number. One of the two sizes will
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* be used depending on the scaling configuration.
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*/
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- u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
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+ u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
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u32 lbm;
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- if (vc4_state->is_unity)
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- return 0;
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- else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
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- lbm = pix_per_line * 8;
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- else {
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- /* In special cases, this multiplier might be 12. */
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+ if (!vc4_state->is_yuv) {
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+ if (vc4_state->is_unity)
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+ return 0;
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+ else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
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+ lbm = pix_per_line * 8;
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+ else {
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+ /* In special cases, this multiplier might be 12. */
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+ lbm = pix_per_line * 16;
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+ }
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+ } else {
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+ /* There are cases for this going down to a multiplier
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+ * of 2, but according to the firmware source, the
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+ * table in the docs is somewhat wrong.
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+ */
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lbm = pix_per_line * 16;
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}
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@@ -361,33 +446,34 @@ static u32 vc4_lbm_size(struct drm_plane
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return lbm;
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}
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-static void vc4_write_scaling_parameters(struct drm_plane_state *state)
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+static void vc4_write_scaling_parameters(struct drm_plane_state *state,
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+ int channel)
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{
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struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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/* Ch0 H-PPF Word 0: Scaling Parameters */
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- if (vc4_state->x_scaling == VC4_SCALING_PPF) {
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+ if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state,
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- vc4_state->src_w, vc4_state->crtc_w);
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+ vc4_state->src_w[channel], vc4_state->crtc_w);
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}
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/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
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- if (vc4_state->y_scaling == VC4_SCALING_PPF) {
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+ if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state,
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- vc4_state->src_h, vc4_state->crtc_h);
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+ vc4_state->src_h[channel], vc4_state->crtc_h);
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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}
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/* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
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- if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
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+ if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) {
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vc4_write_tpz(vc4_state,
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- vc4_state->src_w, vc4_state->crtc_w);
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+ vc4_state->src_w[channel], vc4_state->crtc_w);
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}
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/* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
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- if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
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+ if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) {
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vc4_write_tpz(vc4_state,
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- vc4_state->src_h, vc4_state->crtc_h);
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+ vc4_state->src_h[channel], vc4_state->crtc_h);
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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}
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}
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@@ -401,13 +487,13 @@ static int vc4_plane_mode_set(struct drm
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struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
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struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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struct drm_framebuffer *fb = state->fb;
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- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
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u32 ctl0_offset = vc4_state->dlist_count;
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const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
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- u32 scl;
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+ int num_planes = drm_format_num_planes(format->drm);
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+ u32 scl0, scl1;
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u32 lbm_size;
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unsigned long irqflags;
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- int ret;
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+ int ret, i;
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ret = vc4_plane_setup_clipping_and_scaling(state);
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if (ret)
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@@ -432,7 +518,19 @@ static int vc4_plane_mode_set(struct drm
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if (ret)
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return ret;
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- scl = vc4_get_scl_field(state);
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+ /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
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+ * and 4:4:4, scl1 should be set to scl0 so both channels of
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+ * the scaler do the same thing. For YUV, the Y plane needs
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+ * to be put in channel 1 and Cb/Cr in channel 0, so we swap
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+ * the scl fields here.
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+ */
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+ if (num_planes == 1) {
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+ scl0 = vc4_get_scl_field(state, 1);
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+ scl1 = scl0;
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+ } else {
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+ scl0 = vc4_get_scl_field(state, 1);
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+ scl1 = vc4_get_scl_field(state, 0);
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+ }
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/* Control word */
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vc4_dlist_write(vc4_state,
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@@ -440,8 +538,8 @@ static int vc4_plane_mode_set(struct drm
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(format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
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(format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
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(vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
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- VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
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- VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
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+ VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) |
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+ VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1));
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/* Position Word 0: Image Positions and Alpha Value */
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vc4_state->pos0_offset = vc4_state->dlist_count;
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@@ -466,35 +564,68 @@ static int vc4_plane_mode_set(struct drm
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SCALER_POS2_ALPHA_MODE_PIPELINE :
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SCALER_POS2_ALPHA_MODE_FIXED,
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SCALER_POS2_ALPHA_MODE) |
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- VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
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- VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
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+ VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) |
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+ VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT));
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/* Position Word 3: Context. Written by the HVS. */
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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- /* Pointer Word 0: RGB / Y Pointer */
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+
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+ /* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers
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+ *
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+ * The pointers may be any byte address.
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+ */
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vc4_state->ptr0_offset = vc4_state->dlist_count;
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- vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
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+ if (!format->flip_cbcr) {
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+ for (i = 0; i < num_planes; i++)
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+ vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
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+ } else {
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+ WARN_ON_ONCE(num_planes != 3);
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+ vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
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+ vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
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+ vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
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+ }
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- /* Pointer Context Word 0: Written by the HVS */
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- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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+ /* Pointer Context Word 0/1/2: Written by the HVS */
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+ for (i = 0; i < num_planes; i++)
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+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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- /* Pitch word 0: Pointer 0 Pitch */
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- vc4_dlist_write(vc4_state,
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- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
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+ /* Pitch word 0/1/2 */
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+ for (i = 0; i < num_planes; i++) {
|
|
+ vc4_dlist_write(vc4_state,
|
|
+ VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH));
|
|
+ }
|
|
+
|
|
+ /* Colorspace conversion words */
|
|
+ if (vc4_state->is_yuv) {
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
|
|
+ }
|
|
|
|
if (!vc4_state->is_unity) {
|
|
/* LBM Base Address. */
|
|
- if (vc4_state->y_scaling != VC4_SCALING_NONE)
|
|
+ if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
|
|
+ vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
|
|
vc4_dlist_write(vc4_state, vc4_state->lbm.start);
|
|
+ }
|
|
|
|
- vc4_write_scaling_parameters(state);
|
|
+ if (num_planes > 1) {
|
|
+ /* Emit Cb/Cr as channel 0 and Y as channel
|
|
+ * 1. This matches how we set up scl0/scl1
|
|
+ * above.
|
|
+ */
|
|
+ vc4_write_scaling_parameters(state, 1);
|
|
+ }
|
|
+ vc4_write_scaling_parameters(state, 0);
|
|
|
|
/* If any PPF setup was done, then all the kernel
|
|
* pointers get uploaded.
|
|
*/
|
|
- if (vc4_state->x_scaling == VC4_SCALING_PPF ||
|
|
- vc4_state->y_scaling == VC4_SCALING_PPF) {
|
|
+ if (vc4_state->x_scaling[0] == VC4_SCALING_PPF ||
|
|
+ vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
|
|
+ vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
|
|
+ vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
|
|
u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
|
|
SCALER_PPF_KERNEL_OFFSET);
|
|
|
|
@@ -698,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct
|
|
struct drm_plane *plane = NULL;
|
|
struct vc4_plane *vc4_plane;
|
|
u32 formats[ARRAY_SIZE(hvs_formats)];
|
|
+ u32 num_formats = 0;
|
|
int ret = 0;
|
|
unsigned i;
|
|
|
|
@@ -708,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct
|
|
goto fail;
|
|
}
|
|
|
|
- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
|
|
- formats[i] = hvs_formats[i].drm;
|
|
+ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
|
|
+ /* Don't allow YUV in cursor planes, since that means
|
|
+ * tuning on the scaler, which we don't allow for the
|
|
+ * cursor.
|
|
+ */
|
|
+ if (type != DRM_PLANE_TYPE_CURSOR ||
|
|
+ hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) {
|
|
+ formats[num_formats++] = hvs_formats[i].drm;
|
|
+ }
|
|
+ }
|
|
plane = &vc4_plane->base;
|
|
ret = drm_universal_plane_init(dev, plane, 0xff,
|
|
&vc4_plane_funcs,
|
|
- formats, ARRAY_SIZE(formats),
|
|
+ formats, num_formats,
|
|
type);
|
|
|
|
drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
|
|
--- a/drivers/gpu/drm/vc4/vc4_regs.h
|
|
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
|
|
@@ -503,7 +503,12 @@ enum hvs_pixel_format {
|
|
HVS_PIXEL_FORMAT_RGB888 = 5,
|
|
HVS_PIXEL_FORMAT_RGBA6666 = 6,
|
|
/* 32bpp */
|
|
- HVS_PIXEL_FORMAT_RGBA8888 = 7
|
|
+ HVS_PIXEL_FORMAT_RGBA8888 = 7,
|
|
+
|
|
+ HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE = 8,
|
|
+ HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE = 9,
|
|
+ HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE = 10,
|
|
+ HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE = 11,
|
|
};
|
|
|
|
/* Note: the LSB is the rightmost character shown. Only valid for
|
|
@@ -585,6 +590,55 @@ enum hvs_pixel_format {
|
|
#define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0)
|
|
#define SCALER_POS2_WIDTH_SHIFT 0
|
|
|
|
+/* Color Space Conversion words. Some values are S2.8 signed
|
|
+ * integers, except that the 2 integer bits map as {0x0: 0, 0x1: 1,
|
|
+ * 0x2: 2, 0x3: -1}
|
|
+ */
|
|
+/* bottom 8 bits of S2.8 contribution of Cr to Blue */
|
|
+#define SCALER_CSC0_COEF_CR_BLU_MASK VC4_MASK(31, 24)
|
|
+#define SCALER_CSC0_COEF_CR_BLU_SHIFT 24
|
|
+/* Signed offset to apply to Y before CSC. (Y' = Y + YY_OFS) */
|
|
+#define SCALER_CSC0_COEF_YY_OFS_MASK VC4_MASK(23, 16)
|
|
+#define SCALER_CSC0_COEF_YY_OFS_SHIFT 16
|
|
+/* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */
|
|
+#define SCALER_CSC0_COEF_CB_OFS_MASK VC4_MASK(15, 8)
|
|
+#define SCALER_CSC0_COEF_CB_OFS_SHIFT 8
|
|
+/* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */
|
|
+#define SCALER_CSC0_COEF_CR_OFS_MASK VC4_MASK(7, 0)
|
|
+#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
|
|
+#define SCALER_CSC0_ITR_R_601_5 0x00f00000
|
|
+#define SCALER_CSC0_ITR_R_709_3 0x00f00000
|
|
+#define SCALER_CSC0_JPEG_JFIF 0x00000000
|
|
+
|
|
+/* S2.8 contribution of Cb to Green */
|
|
+#define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22)
|
|
+#define SCALER_CSC1_COEF_CB_GRN_SHIFT 22
|
|
+/* S2.8 contribution of Cr to Green */
|
|
+#define SCALER_CSC1_COEF_CR_GRN_MASK VC4_MASK(21, 12)
|
|
+#define SCALER_CSC1_COEF_CR_GRN_SHIFT 12
|
|
+/* S2.8 contribution of Y to all of RGB */
|
|
+#define SCALER_CSC1_COEF_YY_ALL_MASK VC4_MASK(11, 2)
|
|
+#define SCALER_CSC1_COEF_YY_ALL_SHIFT 2
|
|
+/* top 2 bits of S2.8 contribution of Cr to Blue */
|
|
+#define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0)
|
|
+#define SCALER_CSC1_COEF_CR_BLU_SHIFT 0
|
|
+#define SCALER_CSC1_ITR_R_601_5 0xe73304a8
|
|
+#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8
|
|
+#define SCALER_CSC1_JPEG_JFIF 0xea34a400
|
|
+
|
|
+/* S2.8 contribution of Cb to Red */
|
|
+#define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20)
|
|
+#define SCALER_CSC2_COEF_CB_RED_SHIFT 20
|
|
+/* S2.8 contribution of Cr to Red */
|
|
+#define SCALER_CSC2_COEF_CR_RED_MASK VC4_MASK(19, 10)
|
|
+#define SCALER_CSC2_COEF_CR_RED_SHIFT 10
|
|
+/* S2.8 contribution of Cb to Blue */
|
|
+#define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10)
|
|
+#define SCALER_CSC2_COEF_CB_BLU_SHIFT 10
|
|
+#define SCALER_CSC2_ITR_R_601_5 0x00066204
|
|
+#define SCALER_CSC2_ITR_R_709_3 0x00072a1c
|
|
+#define SCALER_CSC2_JPEG_JFIF 0x000599c5
|
|
+
|
|
#define SCALER_TPZ0_VERT_RECALC BIT(31)
|
|
#define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)
|
|
#define SCALER_TPZ0_SCALE_SHIFT 8
|