mirror of https://github.com/hak5/openwrt.git
119 lines
3.9 KiB
Diff
119 lines
3.9 KiB
Diff
From 19a393608fdcadad7fdde85e4439f05d10381d84 Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Tue, 15 Dec 2015 15:35:58 -0800
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Subject: [PATCH] clk: bcm2835: Add a driver for the auxiliary peripheral clock
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gates.
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There are a pair of SPI masters and a mini UART that were last minute
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additions. As a result, they didn't get integrated in the same way as
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the other gates off of the VPU clock in CPRMAN.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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updated Makefile to preserve the rasoberry pi architectures
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---
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drivers/clk/bcm/Makefile | 1 +
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drivers/clk/bcm/clk-bcm2835-aux.c | 85 +++++++++++++++++++++++++++++++++++++++
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2 files changed, 86 insertions(+)
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create mode 100644 drivers/clk/bcm/clk-bcm2835-aux.c
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--- a/drivers/clk/bcm/Makefile
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+++ b/drivers/clk/bcm/Makefile
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@@ -4,6 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281
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obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
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obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
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obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835.o
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+obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o
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obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
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obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
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obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
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--- /dev/null
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+++ b/drivers/clk/bcm/clk-bcm2835-aux.c
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@@ -0,0 +1,85 @@
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+/*
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+ * Copyright (C) 2015 Broadcom
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/clk-provider.h>
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+#include <linux/clk/bcm2835.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <dt-bindings/clock/bcm2835-aux.h>
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+
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+#define BCM2835_AUXIRQ 0x00
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+#define BCM2835_AUXENB 0x04
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+
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+static int bcm2835_aux_clk_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct clk_onecell_data *onecell;
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+ const char *parent;
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+ struct clk *parent_clk;
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+ struct resource *res;
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+ void __iomem *reg, *gate;
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+
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+ parent_clk = devm_clk_get(dev, NULL);
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+ if (IS_ERR(parent_clk))
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+ return PTR_ERR(parent_clk);
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+ parent = __clk_get_name(parent_clk);
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ reg = devm_ioremap_resource(dev, res);
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+ if (!reg)
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+ return -ENODEV;
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+
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+ onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
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+ if (!onecell)
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+ return -ENOMEM;
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+ onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
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+ onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT,
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+ sizeof(*onecell->clks), GFP_KERNEL);
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+ if (!onecell->clks)
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+ return -ENOMEM;
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+
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+ gate = reg + BCM2835_AUXENB;
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+ onecell->clks[BCM2835_AUX_CLOCK_UART] =
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+ clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
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+
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+ onecell->clks[BCM2835_AUX_CLOCK_SPI1] =
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+ clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
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+
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+ onecell->clks[BCM2835_AUX_CLOCK_SPI2] =
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+ clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
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+
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+ of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id bcm2835_aux_clk_of_match[] = {
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+ { .compatible = "brcm,bcm2835-aux", },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
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+
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+static struct platform_driver bcm2835_aux_clk_driver = {
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+ .driver = {
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+ .name = "bcm2835-aux-clk",
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+ .of_match_table = bcm2835_aux_clk_of_match,
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+ },
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+ .probe = bcm2835_aux_clk_probe,
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+};
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+builtin_platform_driver(bcm2835_aux_clk_driver);
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+
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+MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
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+MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
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+MODULE_LICENSE("GPL v2");
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