mirror of https://github.com/hak5/openwrt.git
636 lines
17 KiB
Diff
636 lines
17 KiB
Diff
From b78bc1bb96c2db043c3be03c1bcccefa22621543 Mon Sep 17 00:00:00 2001
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From: popcornmix <popcornmix@gmail.com>
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Date: Wed, 17 Jun 2015 15:44:08 +0100
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Subject: [PATCH] Add Chris Boot's i2c driver
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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i2c-bcm2708: fixed baudrate
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Fixed issue where the wrong CDIV value was set for baudrates below 3815 Hz (for 250MHz bus clock).
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In that case the computed CDIV value was more than 0xffff. However the CDIV register width is only 16 bits.
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This resulted in incorrect setting of CDIV and higher baudrate than intended.
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Example: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0x1704 -> 42430Hz
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After correction: 3500Hz -> CDIV=0x11704 -> CDIV(16bit)=0xffff -> 3815Hz
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The correct baudrate is shown in the log after the cdiv > 0xffff correction.
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Perform I2C combined transactions when possible
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Perform I2C combined transactions whenever possible, within the
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restrictions of the Broadcomm Serial Controller.
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Disable DONE interrupt during TA poll
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Prevent interrupt from being triggered if poll is missed and transfer
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starts and finishes.
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i2c: Make combined transactions optional and disabled by default
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i2c: bcm2708: add device tree support
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Add DT support to driver and add to .dtsi file.
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Setup pins in .dts file.
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i2c is disabled by default.
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Signed-off-by: Noralf Tronnes <notro@tronnes.org>
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bcm2708: don't register i2c controllers when using DT
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The devices for the i2c controllers are in the Device Tree.
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Only register devices when not using DT.
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Signed-off-by: Noralf Tronnes <notro@tronnes.org>
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I2C: Only register the I2C device for the current board revision
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i2c_bcm2708: Fix clock reference counting
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Fix grabbing lock from atomic context in i2c driver
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2 main changes:
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- check for timeouts in the bcm2708_bsc_setup function as indicated by this comment:
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/* poll for transfer start bit (should only take 1-20 polls) */
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This implies that the setup function can now fail so account for this everywhere it's called
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- Removed the clk_get_rate call from inside the setup function as it locks a mutex and that's not ok since we call it from under a spin lock.
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i2c-bcm2708: When using DT, leave the GPIO setup to pinctrl
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i2c-bcm2708: Increase timeouts to allow larger transfers
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Use the timeout value provided by the I2C_TIMEOUT ioctl when waiting
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for completion. The default timeout is 1 second.
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See: https://github.com/raspberrypi/linux/issues/260
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i2c-bcm2708/BCM270X_DT: Add support for I2C2
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The third I2C bus (I2C2) is normally reserved for HDMI use. Careless
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use of this bus can break an attached display - use with caution.
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It is recommended to disable accesses by VideoCore by setting
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hdmi_ignore_edid=1 or hdmi_edid_file=1 in config.txt.
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The interface is disabled by default - enable using the
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i2c2_iknowwhatimdoing DT parameter.
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bcm2708-spi: Don't use static pin configuration with DT
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Also remove superfluous error checking - the SPI framework ensures the
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validity of the chip_select value.
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i2c-bcm2708: Remove non-DT support
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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---
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drivers/i2c/busses/Kconfig | 21 +-
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drivers/i2c/busses/Makefile | 2 +
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drivers/i2c/busses/i2c-bcm2708.c | 493 +++++++++++++++++++++++++++++++++++++++
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3 files changed, 515 insertions(+), 1 deletion(-)
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create mode 100644 drivers/i2c/busses/i2c-bcm2708.c
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--- a/drivers/i2c/busses/Kconfig
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+++ b/drivers/i2c/busses/Kconfig
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@@ -8,6 +8,25 @@ menu "I2C Hardware Bus support"
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comment "PC SMBus host controller drivers"
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depends on PCI
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+config I2C_BCM2708
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+ tristate "BCM2708 BSC"
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+ depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835
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+ help
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+ Enabling this option will add BSC (Broadcom Serial Controller)
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+ support for the BCM2708. BSC is a Broadcom proprietary bus compatible
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+ with I2C/TWI/SMBus.
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+
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+config I2C_BCM2708_BAUDRATE
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+ prompt "BCM2708 I2C baudrate"
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+ depends on I2C_BCM2708
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+ int
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+ default 100000
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+ help
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+ Set the I2C baudrate. This will alter the default value. A
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+ different baudrate can be set by using a module parameter as well. If
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+ no parameter is provided when loading, this is the value that will be
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+ used.
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+
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config I2C_ALI1535
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tristate "ALI 1535"
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depends on PCI
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@@ -365,7 +384,7 @@ config I2C_AXXIA
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config I2C_BCM2835
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tristate "Broadcom BCM2835 I2C controller"
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- depends on ARCH_BCM2835
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+ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
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help
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If you say yes to this option, support will be included for the
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BCM2835 I2C controller.
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--- a/drivers/i2c/busses/Makefile
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+++ b/drivers/i2c/busses/Makefile
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@@ -2,6 +2,8 @@
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# Makefile for the i2c bus drivers.
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#
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+obj-$(CONFIG_I2C_BCM2708) += i2c-bcm2708.o
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+
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# ACPI drivers
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obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
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--- /dev/null
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+++ b/drivers/i2c/busses/i2c-bcm2708.c
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@@ -0,0 +1,493 @@
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+/*
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+ * Driver for Broadcom BCM2708 BSC Controllers
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+ *
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+ * Copyright (C) 2012 Chris Boot & Frank Buss
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+ *
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+ * This driver is inspired by:
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+ * i2c-ocores.c, by Peter Korsgaard <jacmet@sunsite.dk>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/spinlock.h>
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+#include <linux/clk.h>
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+#include <linux/err.h>
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+#include <linux/of.h>
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+#include <linux/platform_device.h>
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+#include <linux/io.h>
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+#include <linux/slab.h>
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+#include <linux/i2c.h>
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+#include <linux/interrupt.h>
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+#include <linux/sched.h>
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+#include <linux/wait.h>
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+
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+/* BSC register offsets */
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+#define BSC_C 0x00
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+#define BSC_S 0x04
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+#define BSC_DLEN 0x08
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+#define BSC_A 0x0c
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+#define BSC_FIFO 0x10
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+#define BSC_DIV 0x14
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+#define BSC_DEL 0x18
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+#define BSC_CLKT 0x1c
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+
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+/* Bitfields in BSC_C */
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+#define BSC_C_I2CEN 0x00008000
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+#define BSC_C_INTR 0x00000400
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+#define BSC_C_INTT 0x00000200
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+#define BSC_C_INTD 0x00000100
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+#define BSC_C_ST 0x00000080
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+#define BSC_C_CLEAR_1 0x00000020
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+#define BSC_C_CLEAR_2 0x00000010
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+#define BSC_C_READ 0x00000001
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+
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+/* Bitfields in BSC_S */
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+#define BSC_S_CLKT 0x00000200
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+#define BSC_S_ERR 0x00000100
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+#define BSC_S_RXF 0x00000080
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+#define BSC_S_TXE 0x00000040
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+#define BSC_S_RXD 0x00000020
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+#define BSC_S_TXD 0x00000010
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+#define BSC_S_RXR 0x00000008
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+#define BSC_S_TXW 0x00000004
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+#define BSC_S_DONE 0x00000002
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+#define BSC_S_TA 0x00000001
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+
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+#define I2C_WAIT_LOOP_COUNT 200
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+
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+#define DRV_NAME "bcm2708_i2c"
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+
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+static unsigned int baudrate = CONFIG_I2C_BCM2708_BAUDRATE;
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+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
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+MODULE_PARM_DESC(baudrate, "The I2C baudrate");
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+
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+static bool combined = false;
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+module_param(combined, bool, 0644);
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+MODULE_PARM_DESC(combined, "Use combined transactions");
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+
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+struct bcm2708_i2c {
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+ struct i2c_adapter adapter;
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+
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+ spinlock_t lock;
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+ void __iomem *base;
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+ int irq;
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+ struct clk *clk;
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+ u32 cdiv;
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+
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+ struct completion done;
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+
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+ struct i2c_msg *msg;
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+ int pos;
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+ int nmsgs;
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+ bool error;
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+};
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+
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+static inline u32 bcm2708_rd(struct bcm2708_i2c *bi, unsigned reg)
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+{
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+ return readl(bi->base + reg);
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+}
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+
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+static inline void bcm2708_wr(struct bcm2708_i2c *bi, unsigned reg, u32 val)
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+{
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+ writel(val, bi->base + reg);
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+}
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+
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+static inline void bcm2708_bsc_reset(struct bcm2708_i2c *bi)
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+{
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+ bcm2708_wr(bi, BSC_C, 0);
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+ bcm2708_wr(bi, BSC_S, BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE);
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+}
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+
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+static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi)
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+{
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+ while ((bcm2708_rd(bi, BSC_S) & BSC_S_RXD) && (bi->pos < bi->msg->len))
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+ bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO);
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+}
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+
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+static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi)
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+{
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+ while ((bcm2708_rd(bi, BSC_S) & BSC_S_TXD) && (bi->pos < bi->msg->len))
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+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
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+}
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+
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+static inline int bcm2708_bsc_setup(struct bcm2708_i2c *bi)
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+{
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+ u32 cdiv, s;
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+ u32 c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_ST | BSC_C_CLEAR_1;
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+ int wait_loops = I2C_WAIT_LOOP_COUNT;
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+
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+ /* Can't call clk_get_rate as it locks a mutex and here we are spinlocked.
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+ * Use the value that we cached in the probe.
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+ */
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+ cdiv = bi->cdiv;
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+
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+ if (bi->msg->flags & I2C_M_RD)
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+ c |= BSC_C_INTR | BSC_C_READ;
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+ else
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+ c |= BSC_C_INTT;
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+
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+ bcm2708_wr(bi, BSC_DIV, cdiv);
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+ bcm2708_wr(bi, BSC_A, bi->msg->addr);
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+ bcm2708_wr(bi, BSC_DLEN, bi->msg->len);
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+ if (combined)
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+ {
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+ /* Do the next two messages meet combined transaction criteria?
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+ - Current message is a write, next message is a read
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+ - Both messages to same slave address
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+ - Write message can fit inside FIFO (16 bytes or less) */
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+ if ( (bi->nmsgs > 1) &&
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+ !(bi->msg[0].flags & I2C_M_RD) && (bi->msg[1].flags & I2C_M_RD) &&
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+ (bi->msg[0].addr == bi->msg[1].addr) && (bi->msg[0].len <= 16)) {
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+ /* Fill FIFO with entire write message (16 byte FIFO) */
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+ while (bi->pos < bi->msg->len) {
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+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
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+ }
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+ /* Start write transfer (no interrupts, don't clear FIFO) */
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+ bcm2708_wr(bi, BSC_C, BSC_C_I2CEN | BSC_C_ST);
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+
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+ /* poll for transfer start bit (should only take 1-20 polls) */
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+ do {
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+ s = bcm2708_rd(bi, BSC_S);
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+ } while (!(s & (BSC_S_TA | BSC_S_ERR | BSC_S_CLKT | BSC_S_DONE)) && --wait_loops >= 0);
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+
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+ /* did we time out or some error occured? */
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+ if (wait_loops < 0 || (s & (BSC_S_ERR | BSC_S_CLKT))) {
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+ return -1;
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+ }
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+
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+ /* Send next read message before the write transfer finishes. */
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+ bi->nmsgs--;
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+ bi->msg++;
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+ bi->pos = 0;
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+ bcm2708_wr(bi, BSC_DLEN, bi->msg->len);
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+ c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_INTR | BSC_C_ST | BSC_C_READ;
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+ }
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+ }
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+ bcm2708_wr(bi, BSC_C, c);
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+
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+ return 0;
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+}
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+
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+static irqreturn_t bcm2708_i2c_interrupt(int irq, void *dev_id)
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+{
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+ struct bcm2708_i2c *bi = dev_id;
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+ bool handled = true;
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+ u32 s;
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+ int ret;
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+
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+ spin_lock(&bi->lock);
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+
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+ /* we may see camera interrupts on the "other" I2C channel
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+ Just return if we've not sent anything */
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+ if (!bi->nmsgs || !bi->msg) {
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+ goto early_exit;
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+ }
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+
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+ s = bcm2708_rd(bi, BSC_S);
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+
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+ if (s & (BSC_S_CLKT | BSC_S_ERR)) {
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+ bcm2708_bsc_reset(bi);
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+ bi->error = true;
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+
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+ bi->msg = 0; /* to inform the that all work is done */
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+ bi->nmsgs = 0;
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+ /* wake up our bh */
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+ complete(&bi->done);
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+ } else if (s & BSC_S_DONE) {
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+ bi->nmsgs--;
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+
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+ if (bi->msg->flags & I2C_M_RD) {
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+ bcm2708_bsc_fifo_drain(bi);
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+ }
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+
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+ bcm2708_bsc_reset(bi);
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+
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+ if (bi->nmsgs) {
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+ /* advance to next message */
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+ bi->msg++;
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+ bi->pos = 0;
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+ ret = bcm2708_bsc_setup(bi);
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+ if (ret < 0) {
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+ bcm2708_bsc_reset(bi);
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+ bi->error = true;
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+ bi->msg = 0; /* to inform the that all work is done */
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+ bi->nmsgs = 0;
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+ /* wake up our bh */
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+ complete(&bi->done);
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+ goto early_exit;
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+ }
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+ } else {
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+ bi->msg = 0; /* to inform the that all work is done */
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+ bi->nmsgs = 0;
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+ /* wake up our bh */
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+ complete(&bi->done);
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+ }
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+ } else if (s & BSC_S_TXW) {
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+ bcm2708_bsc_fifo_fill(bi);
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+ } else if (s & BSC_S_RXR) {
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+ bcm2708_bsc_fifo_drain(bi);
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+ } else {
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+ handled = false;
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+ }
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+
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+early_exit:
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+ spin_unlock(&bi->lock);
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+
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+ return handled ? IRQ_HANDLED : IRQ_NONE;
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+}
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+
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+static int bcm2708_i2c_master_xfer(struct i2c_adapter *adap,
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+ struct i2c_msg *msgs, int num)
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+{
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+ struct bcm2708_i2c *bi = adap->algo_data;
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+ unsigned long flags;
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+ int ret;
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+
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+ spin_lock_irqsave(&bi->lock, flags);
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+
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+ reinit_completion(&bi->done);
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+ bi->msg = msgs;
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+ bi->pos = 0;
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+ bi->nmsgs = num;
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+ bi->error = false;
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+
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+ ret = bcm2708_bsc_setup(bi);
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+
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+ spin_unlock_irqrestore(&bi->lock, flags);
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+
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+ /* check the result of the setup */
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+ if (ret < 0)
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+ {
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+ dev_err(&adap->dev, "transfer setup timed out\n");
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+ goto error_timeout;
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+ }
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+
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+ ret = wait_for_completion_timeout(&bi->done, adap->timeout);
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+ if (ret == 0) {
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+ dev_err(&adap->dev, "transfer timed out\n");
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+ goto error_timeout;
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+ }
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+
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+ ret = bi->error ? -EIO : num;
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+ return ret;
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+
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+error_timeout:
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+ spin_lock_irqsave(&bi->lock, flags);
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+ bcm2708_bsc_reset(bi);
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+ bi->msg = 0; /* to inform the interrupt handler that there's nothing else to be done */
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+ bi->nmsgs = 0;
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+ spin_unlock_irqrestore(&bi->lock, flags);
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+ return -ETIMEDOUT;
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+}
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+
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+static u32 bcm2708_i2c_functionality(struct i2c_adapter *adap)
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+{
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+ return I2C_FUNC_I2C | /*I2C_FUNC_10BIT_ADDR |*/ I2C_FUNC_SMBUS_EMUL;
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+}
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+
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+static struct i2c_algorithm bcm2708_i2c_algorithm = {
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+ .master_xfer = bcm2708_i2c_master_xfer,
|
|
+ .functionality = bcm2708_i2c_functionality,
|
|
+};
|
|
+
|
|
+static int bcm2708_i2c_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct resource *regs;
|
|
+ int irq, err = -ENOMEM;
|
|
+ struct clk *clk;
|
|
+ struct bcm2708_i2c *bi;
|
|
+ struct i2c_adapter *adap;
|
|
+ unsigned long bus_hz;
|
|
+ u32 cdiv;
|
|
+
|
|
+ if (pdev->dev.of_node) {
|
|
+ u32 bus_clk_rate;
|
|
+ pdev->id = of_alias_get_id(pdev->dev.of_node, "i2c");
|
|
+ if (pdev->id < 0) {
|
|
+ dev_err(&pdev->dev, "alias is missing\n");
|
|
+ return -EINVAL;
|
|
+ }
|
|
+ if (!of_property_read_u32(pdev->dev.of_node,
|
|
+ "clock-frequency", &bus_clk_rate))
|
|
+ baudrate = bus_clk_rate;
|
|
+ else
|
|
+ dev_warn(&pdev->dev,
|
|
+ "Could not read clock-frequency property\n");
|
|
+ }
|
|
+
|
|
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
+ if (!regs) {
|
|
+ dev_err(&pdev->dev, "could not get IO memory\n");
|
|
+ return -ENXIO;
|
|
+ }
|
|
+
|
|
+ irq = platform_get_irq(pdev, 0);
|
|
+ if (irq < 0) {
|
|
+ dev_err(&pdev->dev, "could not get IRQ\n");
|
|
+ return irq;
|
|
+ }
|
|
+
|
|
+ clk = clk_get(&pdev->dev, NULL);
|
|
+ if (IS_ERR(clk)) {
|
|
+ dev_err(&pdev->dev, "could not find clk: %ld\n", PTR_ERR(clk));
|
|
+ return PTR_ERR(clk);
|
|
+ }
|
|
+
|
|
+ err = clk_prepare_enable(clk);
|
|
+ if (err) {
|
|
+ dev_err(&pdev->dev, "could not enable clk: %d\n", err);
|
|
+ goto out_clk_put;
|
|
+ }
|
|
+
|
|
+ bi = kzalloc(sizeof(*bi), GFP_KERNEL);
|
|
+ if (!bi)
|
|
+ goto out_clk_disable;
|
|
+
|
|
+ platform_set_drvdata(pdev, bi);
|
|
+
|
|
+ adap = &bi->adapter;
|
|
+ adap->class = I2C_CLASS_HWMON | I2C_CLASS_DDC;
|
|
+ adap->algo = &bcm2708_i2c_algorithm;
|
|
+ adap->algo_data = bi;
|
|
+ adap->dev.parent = &pdev->dev;
|
|
+ adap->nr = pdev->id;
|
|
+ strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
|
|
+ adap->dev.of_node = pdev->dev.of_node;
|
|
+
|
|
+ switch (pdev->id) {
|
|
+ case 0:
|
|
+ adap->class = I2C_CLASS_HWMON;
|
|
+ break;
|
|
+ case 1:
|
|
+ adap->class = I2C_CLASS_DDC;
|
|
+ break;
|
|
+ case 2:
|
|
+ adap->class = I2C_CLASS_DDC;
|
|
+ break;
|
|
+ default:
|
|
+ dev_err(&pdev->dev, "can only bind to BSC 0, 1 or 2\n");
|
|
+ err = -ENXIO;
|
|
+ goto out_free_bi;
|
|
+ }
|
|
+
|
|
+ spin_lock_init(&bi->lock);
|
|
+ init_completion(&bi->done);
|
|
+
|
|
+ bi->base = ioremap(regs->start, resource_size(regs));
|
|
+ if (!bi->base) {
|
|
+ dev_err(&pdev->dev, "could not remap memory\n");
|
|
+ goto out_free_bi;
|
|
+ }
|
|
+
|
|
+ bi->irq = irq;
|
|
+ bi->clk = clk;
|
|
+
|
|
+ err = request_irq(irq, bcm2708_i2c_interrupt, IRQF_SHARED,
|
|
+ dev_name(&pdev->dev), bi);
|
|
+ if (err) {
|
|
+ dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
|
|
+ goto out_iounmap;
|
|
+ }
|
|
+
|
|
+ bcm2708_bsc_reset(bi);
|
|
+
|
|
+ err = i2c_add_numbered_adapter(adap);
|
|
+ if (err < 0) {
|
|
+ dev_err(&pdev->dev, "could not add I2C adapter: %d\n", err);
|
|
+ goto out_free_irq;
|
|
+ }
|
|
+
|
|
+ bus_hz = clk_get_rate(bi->clk);
|
|
+ cdiv = bus_hz / baudrate;
|
|
+ if (cdiv > 0xffff) {
|
|
+ cdiv = 0xffff;
|
|
+ baudrate = bus_hz / cdiv;
|
|
+ }
|
|
+ bi->cdiv = cdiv;
|
|
+
|
|
+ dev_info(&pdev->dev, "BSC%d Controller at 0x%08lx (irq %d) (baudrate %d)\n",
|
|
+ pdev->id, (unsigned long)regs->start, irq, baudrate);
|
|
+
|
|
+ return 0;
|
|
+
|
|
+out_free_irq:
|
|
+ free_irq(bi->irq, bi);
|
|
+out_iounmap:
|
|
+ iounmap(bi->base);
|
|
+out_free_bi:
|
|
+ kfree(bi);
|
|
+out_clk_disable:
|
|
+ clk_disable_unprepare(clk);
|
|
+out_clk_put:
|
|
+ clk_put(clk);
|
|
+ return err;
|
|
+}
|
|
+
|
|
+static int bcm2708_i2c_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct bcm2708_i2c *bi = platform_get_drvdata(pdev);
|
|
+
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
+
|
|
+ i2c_del_adapter(&bi->adapter);
|
|
+ free_irq(bi->irq, bi);
|
|
+ iounmap(bi->base);
|
|
+ clk_disable_unprepare(bi->clk);
|
|
+ clk_put(bi->clk);
|
|
+ kfree(bi);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id bcm2708_i2c_of_match[] = {
|
|
+ { .compatible = "brcm,bcm2708-i2c" },
|
|
+ {},
|
|
+};
|
|
+MODULE_DEVICE_TABLE(of, bcm2708_i2c_of_match);
|
|
+
|
|
+static struct platform_driver bcm2708_i2c_driver = {
|
|
+ .driver = {
|
|
+ .name = DRV_NAME,
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = bcm2708_i2c_of_match,
|
|
+ },
|
|
+ .probe = bcm2708_i2c_probe,
|
|
+ .remove = bcm2708_i2c_remove,
|
|
+};
|
|
+
|
|
+// module_platform_driver(bcm2708_i2c_driver);
|
|
+
|
|
+
|
|
+static int __init bcm2708_i2c_init(void)
|
|
+{
|
|
+ return platform_driver_register(&bcm2708_i2c_driver);
|
|
+}
|
|
+
|
|
+static void __exit bcm2708_i2c_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&bcm2708_i2c_driver);
|
|
+}
|
|
+
|
|
+module_init(bcm2708_i2c_init);
|
|
+module_exit(bcm2708_i2c_exit);
|
|
+
|
|
+
|
|
+
|
|
+MODULE_DESCRIPTION("BSC controller driver for Broadcom BCM2708");
|
|
+MODULE_AUTHOR("Chris Boot <bootc@bootc.net>");
|
|
+MODULE_LICENSE("GPL v2");
|
|
+MODULE_ALIAS("platform:" DRV_NAME);
|