mirror of https://github.com/hak5/openwrt.git
317 lines
9.8 KiB
Diff
317 lines
9.8 KiB
Diff
From c64d8ab6260330fa2fe9a2d676256697e4e2a83c Mon Sep 17 00:00:00 2001
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From: Biwen Li <biwen.li@nxp.com>
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Date: Tue, 30 Oct 2018 18:26:44 +0800
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Subject: [PATCH 31/40] ls2-console: support layerscape
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This is an integrated patch of ls2-console for
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layerscape
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Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Signed-off-by: Biwen Li <biwen.li@nxp.com>
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---
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drivers/soc/fsl/ls2-console/Kconfig | 4 +
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drivers/soc/fsl/ls2-console/Makefile | 1 +
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drivers/soc/fsl/ls2-console/ls2-console.c | 284 ++++++++++++++++++++++
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3 files changed, 289 insertions(+)
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create mode 100644 drivers/soc/fsl/ls2-console/Kconfig
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create mode 100644 drivers/soc/fsl/ls2-console/Makefile
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create mode 100644 drivers/soc/fsl/ls2-console/ls2-console.c
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--- /dev/null
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+++ b/drivers/soc/fsl/ls2-console/Kconfig
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@@ -0,0 +1,4 @@
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+config FSL_LS2_CONSOLE
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+ tristate "Layerscape MC and AIOP console support"
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+ depends on ARCH_LAYERSCAPE
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+ default y
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--- /dev/null
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+++ b/drivers/soc/fsl/ls2-console/Makefile
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@@ -0,0 +1 @@
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+obj-$(CONFIG_FSL_LS2_CONSOLE) += ls2-console.o
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--- /dev/null
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+++ b/drivers/soc/fsl/ls2-console/ls2-console.c
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@@ -0,0 +1,284 @@
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+/* Copyright 2015-2016 Freescale Semiconductor Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * * Neither the name of the above-listed copyright holders nor the
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+ * names of any contributors may be used to endorse or promote products
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+ * derived from this software without specific prior written permission.
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+ *
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ * POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+#include <linux/miscdevice.h>
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+#include <linux/uaccess.h>
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+#include <linux/poll.h>
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+#include <linux/compat.h>
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+#include <linux/module.h>
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+#include <linux/slab.h>
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+#include <linux/io.h>
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+
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+/* SoC address for the MC firmware base low/high registers */
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+#define SOC_CCSR_MC_FW_BASE_ADDR_REGS 0x8340020
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+#define SOC_CCSR_MC_FW_BASE_ADDR_REGS_SIZE 2
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+/* MC firmware base low/high registers indexes */
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+#define MCFBALR_OFFSET 0
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+#define MCFBAHR_OFFSET 1
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+
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+/* Bit mask used to obtain the most significant part of the MC base address */
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+#define MC_FW_HIGH_ADDR_MASK 0x1FFFF
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+/* Bit mask used to obtain the least significant part of the MC base address */
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+#define MC_FW_LOW_ADDR_MASK 0xE0000000
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+
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+#define MC_BUFFER_OFFSET 0x01000000
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+#define MC_BUFFER_SIZE (1024*1024*16)
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+#define MC_OFFSET_DELTA (MC_BUFFER_OFFSET)
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+
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+#define AIOP_BUFFER_OFFSET 0x06000000
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+#define AIOP_BUFFER_SIZE (1024*1024*16)
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+#define AIOP_OFFSET_DELTA (0)
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+
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+struct log_header {
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+ char magic_word[8]; /* magic word */
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+ uint32_t buf_start; /* holds the 32-bit little-endian
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+ * offset of the start of the buffer
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+ */
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+ uint32_t buf_length; /* holds the 32-bit little-endian
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+ * length of the buffer
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+ */
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+ uint32_t last_byte; /* holds the 32-bit little-endian offset
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+ * of the byte after the last byte that
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+ * was written
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+ */
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+ char reserved[44];
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+};
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+
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+#define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
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+#define LOG_VERSION_MAJOR 1
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+#define LOG_VERSION_MINOR 0
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+
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+
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+#define invalidate(p) { asm volatile("dc ivac, %0" : : "r" (p) : "memory"); }
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+
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+struct console_data {
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+ char *map_addr;
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+ struct log_header *hdr;
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+ char *start_addr; /* Start of buffer */
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+ char *end_addr; /* End of buffer */
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+ char *end_of_data; /* Current end of data */
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+ char *cur_ptr; /* Last data sent to console */
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+};
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+
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+#define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
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+
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+static inline void __adjust_end(struct console_data *cd)
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+{
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+ cd->end_of_data = cd->start_addr
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+ + LAST_BYTE(le32_to_cpu(cd->hdr->last_byte));
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+}
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+
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+static inline void adjust_end(struct console_data *cd)
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+{
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+ invalidate(cd->hdr);
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+ __adjust_end(cd);
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+}
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+
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+static inline uint64_t get_mc_fw_base_address(void)
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+{
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+ u32 *mcfbaregs = (u32 *) ioremap(SOC_CCSR_MC_FW_BASE_ADDR_REGS,
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+ SOC_CCSR_MC_FW_BASE_ADDR_REGS_SIZE);
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+ u64 mcfwbase = 0ULL;
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+
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+ mcfwbase = readl(mcfbaregs + MCFBAHR_OFFSET) & MC_FW_HIGH_ADDR_MASK;
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+ mcfwbase <<= 32;
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+ mcfwbase |= readl(mcfbaregs + MCFBALR_OFFSET) & MC_FW_LOW_ADDR_MASK;
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+ iounmap(mcfbaregs);
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+ pr_info("fsl-ls2-console: MC base address at 0x%016llx\n", mcfwbase);
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+ return mcfwbase;
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+}
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+
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+static int fsl_ls2_generic_console_open(struct inode *node, struct file *fp,
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+ u64 offset, u64 size,
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+ uint8_t *emagic, uint8_t magic_len,
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+ u32 offset_delta)
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+{
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+ struct console_data *cd;
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+ uint8_t *magic;
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+ uint32_t wrapped;
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+
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+ cd = kmalloc(sizeof(*cd), GFP_KERNEL);
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+ if (cd == NULL)
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+ return -ENOMEM;
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+ fp->private_data = cd;
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+ cd->map_addr = ioremap(get_mc_fw_base_address() + offset, size);
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+
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+ cd->hdr = (struct log_header *) cd->map_addr;
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+ invalidate(cd->hdr);
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+
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+ magic = cd->hdr->magic_word;
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+ if (memcmp(magic, emagic, magic_len)) {
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+ pr_info("magic didn't match!\n");
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+ pr_info("expected: %02x %02x %02x %02x %02x %02x %02x %02x\n",
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+ emagic[0], emagic[1], emagic[2], emagic[3],
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+ emagic[4], emagic[5], emagic[6], emagic[7]);
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+ pr_info(" seen: %02x %02x %02x %02x %02x %02x %02x %02x\n",
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+ magic[0], magic[1], magic[2], magic[3],
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+ magic[4], magic[5], magic[6], magic[7]);
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+ kfree(cd);
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+ iounmap(cd->map_addr);
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+ return -EIO;
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+ }
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+
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+ cd->start_addr = cd->map_addr
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+ + le32_to_cpu(cd->hdr->buf_start) - offset_delta;
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+ cd->end_addr = cd->start_addr + le32_to_cpu(cd->hdr->buf_length);
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+
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+ wrapped = le32_to_cpu(cd->hdr->last_byte)
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+ & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
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+
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+ __adjust_end(cd);
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+ if (wrapped && (cd->end_of_data != cd->end_addr))
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+ cd->cur_ptr = cd->end_of_data+1;
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+ else
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+ cd->cur_ptr = cd->start_addr;
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+
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+ return 0;
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+}
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+
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+static int fsl_ls2_mc_console_open(struct inode *node, struct file *fp)
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+{
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+ uint8_t magic_word[] = { 0, 1, 'C', 'M' };
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+
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+ return fsl_ls2_generic_console_open(node, fp,
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+ MC_BUFFER_OFFSET, MC_BUFFER_SIZE,
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+ magic_word, sizeof(magic_word),
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+ MC_OFFSET_DELTA);
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+}
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+
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+static int fsl_ls2_aiop_console_open(struct inode *node, struct file *fp)
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+{
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+ uint8_t magic_word[] = { 'P', 'O', 'I', 'A' };
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+
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+ return fsl_ls2_generic_console_open(node, fp,
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+ AIOP_BUFFER_OFFSET, AIOP_BUFFER_SIZE,
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+ magic_word, sizeof(magic_word),
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+ AIOP_OFFSET_DELTA);
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+}
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+
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+static int fsl_ls2_console_close(struct inode *node, struct file *fp)
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+{
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+ struct console_data *cd = fp->private_data;
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+
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+ iounmap(cd->map_addr);
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+ kfree(cd);
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+ return 0;
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+}
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+
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+ssize_t fsl_ls2_console_read(struct file *fp, char __user *buf, size_t count,
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+ loff_t *f_pos)
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+{
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+ struct console_data *cd = fp->private_data;
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+ size_t bytes = 0;
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+ char data;
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+
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+ /* Check if we need to adjust the end of data addr */
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+ adjust_end(cd);
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+
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+ while ((count != bytes) && (cd->end_of_data != cd->cur_ptr)) {
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+ if (((u64)cd->cur_ptr) % 64 == 0)
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+ invalidate(cd->cur_ptr);
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+
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+ data = *(cd->cur_ptr);
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+ if (copy_to_user(&buf[bytes], &data, 1))
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+ return -EFAULT;
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+ cd->cur_ptr++;
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+ if (cd->cur_ptr >= cd->end_addr)
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+ cd->cur_ptr = cd->start_addr;
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+ ++bytes;
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+ }
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+ return bytes;
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+}
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+
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+static const struct file_operations fsl_ls2_mc_console_fops = {
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+ .owner = THIS_MODULE,
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+ .open = fsl_ls2_mc_console_open,
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+ .release = fsl_ls2_console_close,
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+ .read = fsl_ls2_console_read,
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+};
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+
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+static struct miscdevice fsl_ls2_mc_console_dev = {
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+ .minor = MISC_DYNAMIC_MINOR,
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+ .name = "fsl_mc_console",
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+ .fops = &fsl_ls2_mc_console_fops
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+};
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+
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+static const struct file_operations fsl_ls2_aiop_console_fops = {
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+ .owner = THIS_MODULE,
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+ .open = fsl_ls2_aiop_console_open,
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+ .release = fsl_ls2_console_close,
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+ .read = fsl_ls2_console_read,
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+};
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+
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+static struct miscdevice fsl_ls2_aiop_console_dev = {
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+ .minor = MISC_DYNAMIC_MINOR,
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+ .name = "fsl_aiop_console",
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+ .fops = &fsl_ls2_aiop_console_fops
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+};
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+
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+static int __init fsl_ls2_console_init(void)
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+{
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+ int err = 0;
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+
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+ pr_info("Freescale LS2 console driver\n");
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+ err = misc_register(&fsl_ls2_mc_console_dev);
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+ if (err) {
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+ pr_err("fsl_mc_console: cannot register device\n");
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+ return err;
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+ }
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+ pr_info("fsl-ls2-console: device %s registered\n",
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+ fsl_ls2_mc_console_dev.name);
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+
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+ err = misc_register(&fsl_ls2_aiop_console_dev);
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+ if (err) {
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+ pr_err("fsl_aiop_console: cannot register device\n");
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+ return err;
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+ }
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+ pr_info("fsl-ls2-console: device %s registered\n",
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+ fsl_ls2_aiop_console_dev.name);
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+
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+ return 0;
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+}
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+
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+static void __exit fsl_ls2_console_exit(void)
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+{
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+ misc_deregister(&fsl_ls2_mc_console_dev);
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+
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+ misc_deregister(&fsl_ls2_aiop_console_dev);
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+}
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+
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+module_init(fsl_ls2_console_init);
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+module_exit(fsl_ls2_console_exit);
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+
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+MODULE_AUTHOR("Roy Pledge <roy.pledge@freescale.com>");
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+MODULE_LICENSE("Dual BSD/GPL");
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+MODULE_DESCRIPTION("Freescale LS2 console driver");
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