mirror of https://github.com/hak5/openwrt.git
183 lines
4.8 KiB
Diff
183 lines
4.8 KiB
Diff
From df59c3b7030b6d7802fe5e5abda81467fcdf2178 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Fri, 3 Jul 2015 05:46:13 +0200
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Subject: [PATCH 74/76] dts
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---
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arch/arm/boot/dts/mt7623-evb.dts | 124 +++++++++++++++++++++++++++++++++++++-
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arch/arm/boot/dts/mt7623.dtsi | 11 ++++
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2 files changed, 133 insertions(+), 2 deletions(-)
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--- a/arch/arm/boot/dts/mt7623-evb.dts
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+++ b/arch/arm/boot/dts/mt7623-evb.dts
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@@ -145,8 +145,8 @@
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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-// vmmc-supply = <&mt6397_vemc_3v3_reg>;
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-// vqmmc-supply = <&mt6397_vio18_reg>;
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+// vmmc-supply = <&mt6323_vemc_3v3_reg>;
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+// vqmmc-supply = <&mt6323_vio18_reg>;
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non-removable;
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};
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@@ -160,3 +160,123 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie_default>;
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};
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+
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+&pwrap {
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+ pmic: mt6323 {
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+ compatible = "mediatek,mt6323";
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+
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+ mt6323regulator: mt6323regulator {
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+ compatible = "mediatek,mt6323-regulator";
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+
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+ mt6323_vproc_reg: buck_vproc {
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+ regulator-compatible = "buck_vproc";
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+ regulator-name = "vproc";
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+ regulator-min-microvolt = < 700000>;
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+ regulator-max-microvolt = <1493750>;
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+ regulator-ramp-delay = <6250>;
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vsys_reg: buck_vsys {
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+ regulator-compatible = "buck_vsys";
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+ regulator-name = "vsys";
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+ regulator-min-microvolt = <1400000>;
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+ regulator-max-microvolt = <3000000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vpa_reg: buck_vpa {
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+ regulator-compatible = "buck_vpa";
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+ regulator-name = "vpa";
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+ regulator-min-microvolt = < 500000>;
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+ regulator-max-microvolt = <3650000>;
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+ regulator-ramp-delay = <50000>;
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vtcxo_reg: ldo_vtcxo {
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+ regulator-compatible = "ldo_vtcxo";
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+ regulator-name = "vtcxo";
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+ regulator-always-on;
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+ };
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+
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+ mt6323_va_reg: ldo_va {
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+ regulator-compatible = "ldo_va";
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+ regulator-name = "va";
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vcn28_reg: ldo_vcn28 {
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+ regulator-compatible = "ldo_vcn28";
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+ regulator-name = "vcn28";
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vcn33_reg: ldo_vcn33 {
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+ regulator-compatible = "ldo_vcn33";
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+ regulator-name = "vcn33";
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vcama_reg: ldo_vcama {
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+ regulator-compatible = "ldo_vcama";
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+ regulator-name = "vcama";
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+ regulator-min-microvolt = <1500000>;
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+ regulator-max-microvolt = <2800000>;
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+ regulator-enable-ramp-delay = <218>;
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+ };
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+
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+ mt6323_vio28_reg: ldo_vio28 {
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+ regulator-compatible = "ldo_vio28";
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+ regulator-name = "vio28";
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+ regulator-always-on;
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+ };
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+
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+ mt6323_vusb_reg: ldo_vusb {
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+ regulator-compatible = "ldo_vusb";
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+ regulator-name = "vusb";
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+ };
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+
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+ mt6323_vmc_reg: ldo_vmc {
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+ regulator-compatible = "ldo_vmc";
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+ regulator-name = "vmc";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-enable-ramp-delay = <218>;
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+ };
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+
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+ mt6323_vmch_reg: ldo_vmch {
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+ regulator-compatible = "ldo_vmch";
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+ regulator-name = "vmch";
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-enable-ramp-delay = <218>;
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+ };
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+
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+ mt6323_vemc_3v3_reg: ldo_vemc3v3 {
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+ regulator-compatible = "ldo_vemc3v3";
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+ regulator-name = "vemc_3v3";
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-enable-ramp-delay = <218>;
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+ };
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+
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+ mt6323_vgp1_reg: ldo_vgp1 {
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+ regulator-compatible = "ldo_vgp1";
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+ regulator-name = "vcamd";
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+ regulator-min-microvolt = <1220000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-enable-ramp-delay = <240>;
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+ };
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+
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+ mt6323_vgp2_reg: ldo_vgp2 {
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+ regulator-compatible = "ldo_vgp2";
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+ regulator-name = "vcamio";
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-enable-ramp-delay = <218>;
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+ };
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+ };
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+ };
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+};
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--- a/arch/arm/boot/dts/mt7623.dtsi
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+++ b/arch/arm/boot/dts/mt7623.dtsi
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@@ -150,6 +150,17 @@
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clock-names = "system-clk", "rtc-clk";
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};
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+ pwrap: pwrap@1000f000 {
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+ compatible = "mediatek,mt7623-pwrap";
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+ reg = <0 0x1000f000 0 0x1000>;
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+ reg-names = "pwrap";
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+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
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+ resets = <&infracfg MT7623_INFRA_PMIC_WRAP_RST>;
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+ reset-names = "pwrap";
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+ clocks = <&clk26m>, <&clk26m>;
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+ clock-names = "spi", "wrap";
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+ };
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+
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sysirq: interrupt-controller@10200100 {
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compatible = "mediatek,mt7623-sysirq",
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"mediatek,mt6577-sysirq";
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@@ -311,6 +322,7 @@
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device_type = "pci";
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bus-range = <0 255>;
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+ status = "disabled";
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ranges = <
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0x02000000 0 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
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0x01000000 0 0 0x00000000 0x1A160000 0 0x00010000 /* io space */
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@@ -343,6 +355,5 @@
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device_type = "pci";
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};
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- status = "disabled";
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};
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};
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