mirror of https://github.com/hak5/openwrt.git
471 lines
16 KiB
Diff
471 lines
16 KiB
Diff
From 32ea3b91046bea40cd1a7a4f16a24d75f53ca92a Mon Sep 17 00:00:00 2001
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From: Hongzhou Yang <hongzhou.yang@mediatek.com>
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Date: Mon, 18 May 2015 23:11:16 -0700
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Subject: [PATCH 52/76] pinctrl: mediatek: add ies/smt control to common code.
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Input enable and smt setting have different register,
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modify code to fix it.
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Several mediatek soc use similar input enable/smt setting
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procedure as mt8173, some soc use generic input enable/smt
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setting, some soc has no input enable/smt setting. Adding
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common code to handle all those cases, so future soc driver
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can use it.
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Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
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---
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drivers/pinctrl/mediatek/pinctrl-mt8173.c | 201 +++++++++++++------------
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drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 82 +++++++---
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drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 31 +++-
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3 files changed, 198 insertions(+), 116 deletions(-)
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--- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
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@@ -18,6 +18,7 @@
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/regmap.h>
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+#include <linux/pinctrl/pinconf-generic.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "pinctrl-mtk-common.h"
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@@ -25,28 +26,6 @@
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#define DRV_BASE 0xb00
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-/**
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- * struct mtk_pin_ies_smt_set - For special pins' ies and smt setting.
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- * @start: The start pin number of those special pins.
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- * @end: The end pin number of those special pins.
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- * @offset: The offset of special setting register.
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- * @bit: The bit of special setting register.
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- */
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-struct mtk_pin_ies_smt_set {
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- unsigned int start;
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- unsigned int end;
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- unsigned int offset;
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- unsigned char bit;
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-};
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-
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-#define MTK_PIN_IES_SMT_SET(_start, _end, _offset, _bit) \
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- { \
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- .start = _start, \
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- .end = _end, \
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- .bit = _bit, \
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- .offset = _offset, \
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- }
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-
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static const struct mtk_pin_spec_pupd_set_samereg mt8173_spec_pupd[] = {
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MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
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MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
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@@ -97,80 +76,114 @@ static int mt8173_spec_pull_set(struct r
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ARRAY_SIZE(mt8173_spec_pupd), pin, align, isup, r1r0);
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}
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-static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = {
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- MTK_PIN_IES_SMT_SET(0, 4, 0x930, 1),
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- MTK_PIN_IES_SMT_SET(5, 9, 0x930, 2),
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- MTK_PIN_IES_SMT_SET(10, 13, 0x930, 10),
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- MTK_PIN_IES_SMT_SET(14, 15, 0x940, 10),
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- MTK_PIN_IES_SMT_SET(16, 16, 0x930, 0),
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- MTK_PIN_IES_SMT_SET(17, 17, 0x950, 2),
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- MTK_PIN_IES_SMT_SET(18, 21, 0x940, 3),
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- MTK_PIN_IES_SMT_SET(29, 32, 0x930, 3),
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- MTK_PIN_IES_SMT_SET(33, 33, 0x930, 4),
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- MTK_PIN_IES_SMT_SET(34, 36, 0x930, 5),
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- MTK_PIN_IES_SMT_SET(37, 38, 0x930, 6),
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- MTK_PIN_IES_SMT_SET(39, 39, 0x930, 7),
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- MTK_PIN_IES_SMT_SET(40, 41, 0x930, 9),
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- MTK_PIN_IES_SMT_SET(42, 42, 0x940, 0),
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- MTK_PIN_IES_SMT_SET(43, 44, 0x930, 11),
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- MTK_PIN_IES_SMT_SET(45, 46, 0x930, 12),
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- MTK_PIN_IES_SMT_SET(57, 64, 0xc20, 13),
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- MTK_PIN_IES_SMT_SET(65, 65, 0xc10, 13),
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- MTK_PIN_IES_SMT_SET(66, 66, 0xc00, 13),
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- MTK_PIN_IES_SMT_SET(67, 67, 0xd10, 13),
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- MTK_PIN_IES_SMT_SET(68, 68, 0xd00, 13),
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- MTK_PIN_IES_SMT_SET(69, 72, 0x940, 14),
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- MTK_PIN_IES_SMT_SET(73, 76, 0xc60, 13),
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- MTK_PIN_IES_SMT_SET(77, 77, 0xc40, 13),
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- MTK_PIN_IES_SMT_SET(78, 78, 0xc50, 13),
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- MTK_PIN_IES_SMT_SET(79, 82, 0x940, 15),
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- MTK_PIN_IES_SMT_SET(83, 83, 0x950, 0),
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- MTK_PIN_IES_SMT_SET(84, 85, 0x950, 1),
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- MTK_PIN_IES_SMT_SET(86, 91, 0x950, 2),
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- MTK_PIN_IES_SMT_SET(92, 92, 0x930, 13),
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- MTK_PIN_IES_SMT_SET(93, 95, 0x930, 14),
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- MTK_PIN_IES_SMT_SET(96, 99, 0x930, 15),
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- MTK_PIN_IES_SMT_SET(100, 103, 0xca0, 13),
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- MTK_PIN_IES_SMT_SET(104, 104, 0xc80, 13),
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- MTK_PIN_IES_SMT_SET(105, 105, 0xc90, 13),
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- MTK_PIN_IES_SMT_SET(106, 107, 0x940, 4),
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- MTK_PIN_IES_SMT_SET(108, 112, 0x940, 1),
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- MTK_PIN_IES_SMT_SET(113, 116, 0x940, 2),
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- MTK_PIN_IES_SMT_SET(117, 118, 0x940, 5),
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- MTK_PIN_IES_SMT_SET(119, 124, 0x940, 6),
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- MTK_PIN_IES_SMT_SET(125, 126, 0x940, 7),
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- MTK_PIN_IES_SMT_SET(127, 127, 0x940, 0),
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- MTK_PIN_IES_SMT_SET(128, 128, 0x950, 8),
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- MTK_PIN_IES_SMT_SET(129, 130, 0x950, 9),
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- MTK_PIN_IES_SMT_SET(131, 132, 0x950, 8),
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- MTK_PIN_IES_SMT_SET(133, 134, 0x910, 8)
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+static const struct mtk_pin_ies_smt_set mt8173_smt_set[] = {
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+ MTK_PIN_IES_SMT_SPEC(0, 4, 0x930, 1),
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+ MTK_PIN_IES_SMT_SPEC(5, 9, 0x930, 2),
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+ MTK_PIN_IES_SMT_SPEC(10, 13, 0x930, 10),
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+ MTK_PIN_IES_SMT_SPEC(14, 15, 0x940, 10),
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+ MTK_PIN_IES_SMT_SPEC(16, 16, 0x930, 0),
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+ MTK_PIN_IES_SMT_SPEC(17, 17, 0x950, 2),
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+ MTK_PIN_IES_SMT_SPEC(18, 21, 0x940, 3),
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+ MTK_PIN_IES_SMT_SPEC(29, 32, 0x930, 3),
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+ MTK_PIN_IES_SMT_SPEC(33, 33, 0x930, 4),
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+ MTK_PIN_IES_SMT_SPEC(34, 36, 0x930, 5),
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+ MTK_PIN_IES_SMT_SPEC(37, 38, 0x930, 6),
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+ MTK_PIN_IES_SMT_SPEC(39, 39, 0x930, 7),
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+ MTK_PIN_IES_SMT_SPEC(40, 41, 0x930, 9),
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+ MTK_PIN_IES_SMT_SPEC(42, 42, 0x940, 0),
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+ MTK_PIN_IES_SMT_SPEC(43, 44, 0x930, 11),
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+ MTK_PIN_IES_SMT_SPEC(45, 46, 0x930, 12),
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+ MTK_PIN_IES_SMT_SPEC(57, 64, 0xc20, 13),
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+ MTK_PIN_IES_SMT_SPEC(65, 65, 0xc10, 13),
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+ MTK_PIN_IES_SMT_SPEC(66, 66, 0xc00, 13),
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+ MTK_PIN_IES_SMT_SPEC(67, 67, 0xd10, 13),
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+ MTK_PIN_IES_SMT_SPEC(68, 68, 0xd00, 13),
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+ MTK_PIN_IES_SMT_SPEC(69, 72, 0x940, 14),
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+ MTK_PIN_IES_SMT_SPEC(73, 76, 0xc60, 13),
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+ MTK_PIN_IES_SMT_SPEC(77, 77, 0xc40, 13),
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+ MTK_PIN_IES_SMT_SPEC(78, 78, 0xc50, 13),
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+ MTK_PIN_IES_SMT_SPEC(79, 82, 0x940, 15),
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+ MTK_PIN_IES_SMT_SPEC(83, 83, 0x950, 0),
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+ MTK_PIN_IES_SMT_SPEC(84, 85, 0x950, 1),
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+ MTK_PIN_IES_SMT_SPEC(86, 91, 0x950, 2),
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+ MTK_PIN_IES_SMT_SPEC(92, 92, 0x930, 13),
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+ MTK_PIN_IES_SMT_SPEC(93, 95, 0x930, 14),
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+ MTK_PIN_IES_SMT_SPEC(96, 99, 0x930, 15),
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+ MTK_PIN_IES_SMT_SPEC(100, 103, 0xca0, 13),
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+ MTK_PIN_IES_SMT_SPEC(104, 104, 0xc80, 13),
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+ MTK_PIN_IES_SMT_SPEC(105, 105, 0xc90, 13),
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+ MTK_PIN_IES_SMT_SPEC(106, 107, 0x940, 4),
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+ MTK_PIN_IES_SMT_SPEC(108, 112, 0x940, 1),
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+ MTK_PIN_IES_SMT_SPEC(113, 116, 0x940, 2),
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+ MTK_PIN_IES_SMT_SPEC(117, 118, 0x940, 5),
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+ MTK_PIN_IES_SMT_SPEC(119, 124, 0x940, 6),
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+ MTK_PIN_IES_SMT_SPEC(125, 126, 0x940, 7),
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+ MTK_PIN_IES_SMT_SPEC(127, 127, 0x940, 0),
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+ MTK_PIN_IES_SMT_SPEC(128, 128, 0x950, 8),
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+ MTK_PIN_IES_SMT_SPEC(129, 130, 0x950, 9),
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+ MTK_PIN_IES_SMT_SPEC(131, 132, 0x950, 8),
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+ MTK_PIN_IES_SMT_SPEC(133, 134, 0x910, 8)
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};
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-static int spec_ies_smt_set(struct regmap *regmap, unsigned int pin,
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- unsigned char align, int value)
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-{
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- unsigned int i, reg_addr, bit;
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- bool find = false;
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+static const struct mtk_pin_ies_smt_set mt8173_ies_set[] = {
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+ MTK_PIN_IES_SMT_SPEC(0, 4, 0x900, 1),
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+ MTK_PIN_IES_SMT_SPEC(5, 9, 0x900, 2),
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+ MTK_PIN_IES_SMT_SPEC(10, 13, 0x900, 10),
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+ MTK_PIN_IES_SMT_SPEC(14, 15, 0x910, 10),
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+ MTK_PIN_IES_SMT_SPEC(16, 16, 0x900, 0),
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+ MTK_PIN_IES_SMT_SPEC(17, 17, 0x920, 2),
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+ MTK_PIN_IES_SMT_SPEC(18, 21, 0x910, 3),
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+ MTK_PIN_IES_SMT_SPEC(29, 32, 0x900, 3),
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+ MTK_PIN_IES_SMT_SPEC(33, 33, 0x900, 4),
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+ MTK_PIN_IES_SMT_SPEC(34, 36, 0x900, 5),
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+ MTK_PIN_IES_SMT_SPEC(37, 38, 0x900, 6),
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+ MTK_PIN_IES_SMT_SPEC(39, 39, 0x900, 7),
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+ MTK_PIN_IES_SMT_SPEC(40, 41, 0x900, 9),
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+ MTK_PIN_IES_SMT_SPEC(42, 42, 0x910, 0),
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+ MTK_PIN_IES_SMT_SPEC(43, 44, 0x900, 11),
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+ MTK_PIN_IES_SMT_SPEC(45, 46, 0x900, 12),
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+ MTK_PIN_IES_SMT_SPEC(57, 64, 0xc20, 14),
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+ MTK_PIN_IES_SMT_SPEC(65, 65, 0xc10, 14),
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+ MTK_PIN_IES_SMT_SPEC(66, 66, 0xc00, 14),
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+ MTK_PIN_IES_SMT_SPEC(67, 67, 0xd10, 14),
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+ MTK_PIN_IES_SMT_SPEC(68, 68, 0xd00, 14),
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+ MTK_PIN_IES_SMT_SPEC(69, 72, 0x910, 14),
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+ MTK_PIN_IES_SMT_SPEC(73, 76, 0xc60, 14),
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+ MTK_PIN_IES_SMT_SPEC(77, 77, 0xc40, 14),
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+ MTK_PIN_IES_SMT_SPEC(78, 78, 0xc50, 14),
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+ MTK_PIN_IES_SMT_SPEC(79, 82, 0x910, 15),
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+ MTK_PIN_IES_SMT_SPEC(83, 83, 0x920, 0),
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+ MTK_PIN_IES_SMT_SPEC(84, 85, 0x920, 1),
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+ MTK_PIN_IES_SMT_SPEC(86, 91, 0x920, 2),
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+ MTK_PIN_IES_SMT_SPEC(92, 92, 0x900, 13),
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+ MTK_PIN_IES_SMT_SPEC(93, 95, 0x900, 14),
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+ MTK_PIN_IES_SMT_SPEC(96, 99, 0x900, 15),
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+ MTK_PIN_IES_SMT_SPEC(100, 103, 0xca0, 14),
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+ MTK_PIN_IES_SMT_SPEC(104, 104, 0xc80, 14),
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+ MTK_PIN_IES_SMT_SPEC(105, 105, 0xc90, 14),
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+ MTK_PIN_IES_SMT_SPEC(106, 107, 0x91, 4),
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+ MTK_PIN_IES_SMT_SPEC(108, 112, 0x910, 1),
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+ MTK_PIN_IES_SMT_SPEC(113, 116, 0x910, 2),
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+ MTK_PIN_IES_SMT_SPEC(117, 118, 0x910, 5),
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+ MTK_PIN_IES_SMT_SPEC(119, 124, 0x910, 6),
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+ MTK_PIN_IES_SMT_SPEC(125, 126, 0x910, 7),
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+ MTK_PIN_IES_SMT_SPEC(127, 127, 0x910, 0),
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+ MTK_PIN_IES_SMT_SPEC(128, 128, 0x920, 8),
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+ MTK_PIN_IES_SMT_SPEC(129, 130, 0x920, 9),
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+ MTK_PIN_IES_SMT_SPEC(131, 132, 0x920, 8),
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+ MTK_PIN_IES_SMT_SPEC(133, 134, 0x910, 8)
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+};
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- for (i = 0; i < ARRAY_SIZE(mt8173_ies_smt_set); i++) {
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- if (pin >= mt8173_ies_smt_set[i].start &&
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- pin <= mt8173_ies_smt_set[i].end) {
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- find = true;
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- break;
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- }
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- }
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-
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- if (!find)
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- return -EINVAL;
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-
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- if (value)
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- reg_addr = mt8173_ies_smt_set[i].offset + align;
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- else
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- reg_addr = mt8173_ies_smt_set[i].offset + (align << 1);
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-
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- bit = BIT(mt8173_ies_smt_set[i].bit);
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- regmap_write(regmap, reg_addr, bit);
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- return 0;
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+static int mt8173_ies_smt_set(struct regmap *regmap, unsigned int pin,
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+ unsigned char align, int value, enum pin_config_param arg)
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+{
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+ if (arg == PIN_CONFIG_INPUT_ENABLE)
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+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8173_ies_set,
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+ ARRAY_SIZE(mt8173_ies_set), pin, align, value);
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+ else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE)
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+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8173_smt_set,
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+ ARRAY_SIZE(mt8173_smt_set), pin, align, value);
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+ return -EINVAL;
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}
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static const struct mtk_drv_group_desc mt8173_drv_grp[] = {
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@@ -307,7 +320,7 @@ static const struct mtk_pinctrl_devdata
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.pin_drv_grp = mt8173_pin_drv,
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.n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv),
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.spec_pull_set = mt8173_spec_pull_set,
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- .spec_ies_smt_set = spec_ies_smt_set,
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+ .spec_ies_smt_set = mt8173_ies_smt_set,
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.dir_offset = 0x0000,
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.pullen_offset = 0x0100,
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.pullsel_offset = 0x0200,
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--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
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@@ -107,28 +107,38 @@ static void mtk_gpio_set(struct gpio_chi
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regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit);
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}
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-static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
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- int value, enum pin_config_param param)
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+static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
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+ int value, enum pin_config_param arg)
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{
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unsigned int reg_addr, offset;
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unsigned int bit;
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- int ret;
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+
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+ /**
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+ * Due to some soc are not support ies/smt config, add this special
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+ * control to handle it.
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+ */
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+ if (!pctl->devdata->spec_ies_smt_set &&
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+ pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT &&
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+ arg == PIN_CONFIG_INPUT_ENABLE)
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+ return -EINVAL;
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+
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+ if (!pctl->devdata->spec_ies_smt_set &&
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+ pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT &&
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+ arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE)
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+ return -EINVAL;
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/*
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* Due to some pins are irregular, their input enable and smt
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- * control register are discontinuous, but they are mapping together.
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- * So we need this special handle.
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+ * control register are discontinuous, so we need this special handle.
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*/
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if (pctl->devdata->spec_ies_smt_set) {
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- ret = pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
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- pin, pctl->devdata->port_align, value);
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- if (!ret)
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- return;
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+ return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
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+ pin, pctl->devdata->port_align, value, arg);
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}
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bit = BIT(pin & 0xf);
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- if (param == PIN_CONFIG_INPUT_ENABLE)
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+ if (arg == PIN_CONFIG_INPUT_ENABLE)
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offset = pctl->devdata->ies_offset;
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else
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offset = pctl->devdata->smt_offset;
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@@ -139,6 +149,33 @@ static void mtk_pconf_set_ies_smt(struct
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reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
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regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit);
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+ return 0;
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+}
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+
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+int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap,
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+ const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num,
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+ unsigned int pin, unsigned char align, int value)
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+{
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+ unsigned int i, reg_addr, bit;
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+
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+ for (i = 0; i < info_num; i++) {
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+ if (pin >= ies_smt_infos[i].start &&
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+ pin <= ies_smt_infos[i].end) {
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+ break;
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+ }
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+ }
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+
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+ if (i == info_num)
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+ return -EINVAL;
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+
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+ if (value)
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+ reg_addr = ies_smt_infos[i].offset + align;
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+ else
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+ reg_addr = ies_smt_infos[i].offset + (align << 1);
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+
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+ bit = BIT(ies_smt_infos[i].bit);
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+ regmap_write(regmap, reg_addr, bit);
|
|
+ return 0;
|
|
}
|
|
|
|
static const struct mtk_pin_drv_grp *mtk_find_pin_drv_grp_by_pin(
|
|
@@ -295,36 +332,37 @@ static int mtk_pconf_parse_conf(struct p
|
|
unsigned int pin, enum pin_config_param param,
|
|
enum pin_config_param arg)
|
|
{
|
|
+ int ret = 0;
|
|
struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
switch (param) {
|
|
case PIN_CONFIG_BIAS_DISABLE:
|
|
- mtk_pconf_set_pull_select(pctl, pin, false, false, arg);
|
|
+ ret = mtk_pconf_set_pull_select(pctl, pin, false, false, arg);
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
- mtk_pconf_set_pull_select(pctl, pin, true, true, arg);
|
|
+ ret = mtk_pconf_set_pull_select(pctl, pin, true, true, arg);
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
- mtk_pconf_set_pull_select(pctl, pin, true, false, arg);
|
|
+ ret = mtk_pconf_set_pull_select(pctl, pin, true, false, arg);
|
|
break;
|
|
case PIN_CONFIG_INPUT_ENABLE:
|
|
- mtk_pconf_set_ies_smt(pctl, pin, arg, param);
|
|
+ ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param);
|
|
break;
|
|
case PIN_CONFIG_OUTPUT:
|
|
mtk_gpio_set(pctl->chip, pin, arg);
|
|
- mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false);
|
|
+ ret = mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false);
|
|
break;
|
|
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
|
|
- mtk_pconf_set_ies_smt(pctl, pin, arg, param);
|
|
+ ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param);
|
|
break;
|
|
case PIN_CONFIG_DRIVE_STRENGTH:
|
|
- mtk_pconf_set_driving(pctl, pin, arg);
|
|
+ ret = mtk_pconf_set_driving(pctl, pin, arg);
|
|
break;
|
|
default:
|
|
- return -EINVAL;
|
|
+ ret = -EINVAL;
|
|
}
|
|
|
|
- return 0;
|
|
+ return ret;
|
|
}
|
|
|
|
static int mtk_pconf_group_get(struct pinctrl_dev *pctldev,
|
|
@@ -343,12 +381,14 @@ static int mtk_pconf_group_set(struct pi
|
|
{
|
|
struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
struct mtk_pinctrl_group *g = &pctl->groups[group];
|
|
- int i;
|
|
+ int i, ret;
|
|
|
|
for (i = 0; i < num_configs; i++) {
|
|
- mtk_pconf_parse_conf(pctldev, g->pin,
|
|
+ ret = mtk_pconf_parse_conf(pctldev, g->pin,
|
|
pinconf_to_config_param(configs[i]),
|
|
pinconf_to_config_argument(configs[i]));
|
|
+ if (ret < 0)
|
|
+ return ret;
|
|
|
|
g->config = configs[i];
|
|
}
|
|
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
|
|
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
|
|
@@ -17,6 +17,7 @@
|
|
|
|
#include <linux/pinctrl/pinctrl.h>
|
|
#include <linux/regmap.h>
|
|
+#include <linux/pinctrl/pinconf-generic.h>
|
|
|
|
#define NO_EINT_SUPPORT 255
|
|
#define MT_EDGE_SENSITIVE 0
|
|
@@ -25,6 +26,8 @@
|
|
#define EINT_DBNC_RST_BIT (0x1 << 1)
|
|
#define EINT_DBNC_SET_EN (0x1 << 0)
|
|
|
|
+#define MTK_PINCTRL_NOT_SUPPORT (0xffff)
|
|
+
|
|
struct mtk_desc_function {
|
|
const char *name;
|
|
unsigned char muxval;
|
|
@@ -143,6 +146,28 @@ struct mtk_pin_spec_pupd_set_samereg {
|
|
.r0_bit = _r0, \
|
|
}
|
|
|
|
+/**
|
|
+ * struct mtk_pin_ies_set - For special pins' ies and smt setting.
|
|
+ * @start: The start pin number of those special pins.
|
|
+ * @end: The end pin number of those special pins.
|
|
+ * @offset: The offset of special setting register.
|
|
+ * @bit: The bit of special setting register.
|
|
+ */
|
|
+struct mtk_pin_ies_smt_set {
|
|
+ unsigned short start;
|
|
+ unsigned short end;
|
|
+ unsigned short offset;
|
|
+ unsigned char bit;
|
|
+};
|
|
+
|
|
+#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \
|
|
+ { \
|
|
+ .start = _start, \
|
|
+ .end = _end, \
|
|
+ .bit = _bit, \
|
|
+ .offset = _offset, \
|
|
+ }
|
|
+
|
|
struct mtk_eint_offsets {
|
|
const char *name;
|
|
unsigned int stat;
|
|
@@ -208,7 +233,7 @@ struct mtk_pinctrl_devdata {
|
|
int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
|
|
unsigned char align, bool isup, unsigned int arg);
|
|
int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
|
|
- unsigned char align, int value);
|
|
+ unsigned char align, int value, enum pin_config_param arg);
|
|
unsigned int dir_offset;
|
|
unsigned int ies_offset;
|
|
unsigned int smt_offset;
|
|
@@ -251,4 +276,8 @@ int mtk_pctrl_spec_pull_set_samereg(stru
|
|
unsigned int info_num, unsigned int pin,
|
|
unsigned char align, bool isup, unsigned int r1r0);
|
|
|
|
+int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap,
|
|
+ const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num,
|
|
+ unsigned int pin, unsigned char align, int value);
|
|
+
|
|
#endif /* __PINCTRL_MTK_COMMON_H */
|