mirror of https://github.com/hak5/openwrt.git
168 lines
4.1 KiB
Diff
168 lines
4.1 KiB
Diff
From 661e02b8e2b9a4b48a809bc82dfe8f7b20ca750f Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Thu, 18 Apr 2013 21:14:49 +0200
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Subject: [PATCH 05/13] MIPS: BCM63XX: replace irq dispatch code with a
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generic version
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The generic version uses a variable length of u32 registers of u32/u64.
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This allows easier support for longer registers without having to rewrite
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verything.
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This "generic" version is not slower than the old version in the best case
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(= i == next set bit), and twice as fast in the worst case in 64 bits.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/irq.c | 130 ++++++++++++++++++++---------------------------
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1 file changed, 56 insertions(+), 74 deletions(-)
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--- a/arch/mips/bcm63xx/irq.c
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+++ b/arch/mips/bcm63xx/irq.c
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@@ -240,47 +240,65 @@ static inline void handle_internal(int i
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* will resume the loop where it ended the last time we left this
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* function.
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*/
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-static void __dispatch_internal_32(void)
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-{
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- u32 pending;
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- static int i;
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-
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- pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr);
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-
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- if (!pending)
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- return ;
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-
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- while (1) {
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- int to_call = i;
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- i = (i + 1) & 0x1f;
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- if (pending & (1 << to_call)) {
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- handle_internal(to_call);
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- break;
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- }
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- }
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+#define BUILD_IPIC_INTERNAL(width) \
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+void __dispatch_internal_##width(void) \
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+{ \
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+ u32 pending[width / 32]; \
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+ unsigned int src, tgt; \
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+ bool irqs_pending = false; \
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+ static int i; \
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+ \
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+ /* read registers in reverse order */ \
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+ for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
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+ u32 val; \
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+ \
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+ val = bcm_readl(irq_stat_addr + src * sizeof(u32)); \
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+ val &= bcm_readl(irq_mask_addr + src * sizeof(u32)); \
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+ pending[--tgt] = val; \
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+ \
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+ if (val) \
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+ irqs_pending = true; \
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+ } \
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+ \
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+ if (!irqs_pending) \
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+ return; \
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+ \
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+ while (1) { \
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+ int to_call = i; \
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+ \
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+ i = (i + 1) & (width - 1); \
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+ if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
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+ handle_internal(to_call); \
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+ break; \
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+ } \
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+ } \
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+} \
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+ \
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+static void __internal_irq_mask_##width(unsigned int irq) \
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+{ \
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+ u32 val; \
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+ unsigned reg = (irq / 32) ^ (width/32 - 1); \
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+ unsigned bit = irq & 0x1f; \
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+ \
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+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
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+ val &= ~(1 << bit); \
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+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
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+} \
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+ \
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+static void __internal_irq_unmask_##width(unsigned int irq) \
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+{ \
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+ u32 val; \
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+ unsigned reg = (irq / 32) ^ (width/32 - 1); \
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+ unsigned bit = irq & 0x1f; \
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+ \
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+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \
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+ val |= (1 << bit); \
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+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \
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}
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-static void __dispatch_internal_64(void)
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-{
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- u64 pending;
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- static int i;
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-
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- pending = bcm_readq(irq_stat_addr) & bcm_readq(irq_mask_addr);
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-
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- if (!pending)
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- return ;
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-
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- while (1) {
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- int to_call = i;
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-
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- i = (i + 1) & 0x3f;
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- if (pending & (1ull << to_call)) {
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- handle_internal(to_call);
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- break;
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- }
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- }
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-}
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+BUILD_IPIC_INTERNAL(32);
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+BUILD_IPIC_INTERNAL(64);
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asmlinkage void plat_irq_dispatch(void)
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{
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@@ -317,42 +335,6 @@ asmlinkage void plat_irq_dispatch(void)
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* internal IRQs operations: only mask/unmask on PERF irq mask
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* register.
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*/
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-static void __internal_irq_mask_32(unsigned int irq)
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-{
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- u32 mask;
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-
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- mask = bcm_readl(irq_mask_addr);
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- mask &= ~(1 << irq);
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- bcm_writel(mask, irq_mask_addr);
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-}
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-
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-static void __internal_irq_mask_64(unsigned int irq)
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-{
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- u64 mask;
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-
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- mask = bcm_readq(irq_mask_addr);
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- mask &= ~(1ull << irq);
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- bcm_writeq(mask, irq_mask_addr);
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-}
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-
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-static void __internal_irq_unmask_32(unsigned int irq)
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-{
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- u32 mask;
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-
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- mask = bcm_readl(irq_mask_addr);
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- mask |= (1 << irq);
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- bcm_writel(mask, irq_mask_addr);
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-}
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-
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-static void __internal_irq_unmask_64(unsigned int irq)
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-{
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- u64 mask;
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-
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- mask = bcm_readq(irq_mask_addr);
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- mask |= (1ull << irq);
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- bcm_writeq(mask, irq_mask_addr);
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-}
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-
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static void bcm63xx_internal_irq_mask(struct irq_data *d)
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{
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internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
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