mirror of https://github.com/hak5/openwrt.git
39 lines
1.1 KiB
Diff
39 lines
1.1 KiB
Diff
From 4f6723e8ff497e35c8f2fb20886fccc533c58cdb Mon Sep 17 00:00:00 2001
|
|
From: Sean Cross <xobs@kosagi.com>
|
|
Date: Thu, 26 Sep 2013 10:45:35 +0800
|
|
Subject: [PATCH] ARM: imx6q: clock and Kconfig update for PCIe support
|
|
|
|
Update imx6q clock initialization and Kconfig for PCIe support.
|
|
|
|
Signed-off-by: Sean Cross <xobs@kosagi.com>
|
|
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
|
---
|
|
arch/arm/mach-imx/Kconfig | 2 ++
|
|
arch/arm/mach-imx/clk-imx6q.c | 4 ++++
|
|
2 files changed, 6 insertions(+)
|
|
|
|
--- a/arch/arm/mach-imx/Kconfig
|
|
+++ b/arch/arm/mach-imx/Kconfig
|
|
@@ -806,6 +806,8 @@ config SOC_IMX6Q
|
|
select HAVE_IMX_SRC
|
|
select HAVE_SMP
|
|
select MFD_SYSCON
|
|
+ select MIGHT_HAVE_PCI
|
|
+ select PCI_DOMAINS if PCI
|
|
select PINCTRL
|
|
select PINCTRL_IMX6Q
|
|
select PL310_ERRATA_588369 if CACHE_PL310
|
|
--- a/arch/arm/mach-imx/clk-imx6q.c
|
|
+++ b/arch/arm/mach-imx/clk-imx6q.c
|
|
@@ -586,6 +586,10 @@ int __init mx6q_clocks_init(void)
|
|
clk_prepare_enable(clk[usbphy2_gate]);
|
|
}
|
|
|
|
+ /* All existing boards with PCIe use LVDS1 */
|
|
+ if (IS_ENABLED(CONFIG_PCI_IMX6))
|
|
+ clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
|
|
+
|
|
/* Set initial power mode */
|
|
imx6q_set_lpm(WAIT_CLOCKED);
|
|
|