mirror of https://github.com/hak5/openwrt.git
1205 lines
26 KiB
C
1205 lines
26 KiB
C
/*
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* ADM6996 switch driver
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*
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* swconfig interface based on ar8216.c
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*
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* Copyright (c) 2008 Felix Fietkau <nbd@openwrt.org>
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* VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
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* Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
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* Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License v2 as published by the
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* Free Software Foundation
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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/*#define DEBUG 1*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/adm6996-gpio.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/switch.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include "adm6996.h"
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MODULE_DESCRIPTION("Infineon ADM6996 Switch");
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MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
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MODULE_LICENSE("GPL");
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static const char * const adm6996_model_name[] =
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{
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NULL,
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"ADM6996FC",
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"ADM6996M",
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"ADM6996L"
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};
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struct adm6996_mib_desc {
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unsigned int offset;
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const char *name;
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};
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struct adm6996_priv {
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struct switch_dev dev;
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void *priv;
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u8 eecs;
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u8 eesk;
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u8 eedi;
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u8 eerc;
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enum adm6996_model model;
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bool enable_vlan;
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bool vlan_enabled; /* Current hardware state */
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#ifdef DEBUG
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u16 addr; /* Debugging: register address to operate on */
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#endif
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u16 pvid[ADM_NUM_PORTS]; /* Primary VLAN ID */
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u8 tagged_ports;
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u16 vlan_id[ADM_NUM_VLANS];
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u8 vlan_table[ADM_NUM_VLANS]; /* bitmap, 1 = port is member */
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u8 vlan_tagged[ADM_NUM_VLANS]; /* bitmap, 1 = tagged member */
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struct mutex mib_lock;
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char buf[2048];
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struct mutex reg_mutex;
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/* use abstraction for regops, we want to add gpio support in the future */
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u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
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void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
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};
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#define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
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#define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
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#define MIB_DESC(_o, _n) \
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{ \
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.offset = (_o), \
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.name = (_n), \
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}
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static const struct adm6996_mib_desc adm6996_mibs[] = {
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MIB_DESC(ADM_CL0, "RxPacket"),
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MIB_DESC(ADM_CL6, "RxByte"),
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MIB_DESC(ADM_CL12, "TxPacket"),
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MIB_DESC(ADM_CL18, "TxByte"),
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MIB_DESC(ADM_CL24, "Collision"),
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MIB_DESC(ADM_CL30, "Error"),
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};
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static inline u16
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r16(struct adm6996_priv *priv, enum admreg reg)
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{
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return priv->read(priv, reg);
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}
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static inline void
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w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
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{
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priv->write(priv, reg, val);
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}
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/* Minimum timing constants */
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#define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
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#define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
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#define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
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static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
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{
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int i, len = (bits + 7) / 8;
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u8 mask;
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gpio_set_value(priv->eecs, cs);
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udelay(EECK_EDGE_TIME);
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/* Byte assemble from MSB to LSB */
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for (i = 0; i < len; i++) {
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/* Bit bang from MSB to LSB */
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for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
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/* Clock low */
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gpio_set_value(priv->eesk, 0);
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udelay(EECK_EDGE_TIME);
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/* Output on rising edge */
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gpio_set_value(priv->eedi, (mask & buf[i]));
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udelay(EEDI_SETUP_TIME);
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/* Clock high */
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gpio_set_value(priv->eesk, 1);
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udelay(EECK_EDGE_TIME);
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}
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}
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/* Clock low */
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gpio_set_value(priv->eesk, 0);
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udelay(EECK_EDGE_TIME);
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if (cs)
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gpio_set_value(priv->eecs, 0);
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}
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static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
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{
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int i, len = (bits + 7) / 8;
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u8 mask;
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gpio_set_value(priv->eecs, cs);
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udelay(EECK_EDGE_TIME);
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/* Byte assemble from MSB to LSB */
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for (i = 0; i < len; i++) {
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u8 byte;
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/* Bit bang from MSB to LSB */
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for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
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u8 gp;
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/* Clock low */
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gpio_set_value(priv->eesk, 0);
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udelay(EECK_EDGE_TIME);
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/* Input on rising edge */
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gp = gpio_get_value(priv->eedi);
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if (gp)
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byte |= mask;
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/* Clock high */
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gpio_set_value(priv->eesk, 1);
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udelay(EECK_EDGE_TIME);
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}
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*buf++ = byte;
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}
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/* Clock low */
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gpio_set_value(priv->eesk, 0);
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udelay(EECK_EDGE_TIME);
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if (cs)
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gpio_set_value(priv->eecs, 0);
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}
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/* Advance clock(s) */
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static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
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{
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int i;
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for (i = 0; i < clocks; i++) {
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/* Clock high */
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gpio_set_value(priv->eesk, 1);
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udelay(EECK_EDGE_TIME);
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/* Clock low */
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gpio_set_value(priv->eesk, 0);
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udelay(EECK_EDGE_TIME);
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}
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}
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static u16
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adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
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{
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/* cmd: 01 10 T DD R RRRRRR */
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u8 bits[6] = {
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0xFF, 0xFF, 0xFF, 0xFF,
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(0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
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((reg&63)<<2)
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};
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u8 rbits[4];
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/* Enable GPIO outputs with all pins to 0 */
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gpio_direction_output(priv->eecs, 0);
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gpio_direction_output(priv->eesk, 0);
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gpio_direction_output(priv->eedi, 0);
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adm6996_gpio_write(priv, 0, bits, 46);
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gpio_direction_input(priv->eedi);
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adm6996_gpio_adclk(priv, 2);
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adm6996_gpio_read(priv, 0, rbits, 32);
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/* Extra clock(s) required per datasheet */
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adm6996_gpio_adclk(priv, 2);
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/* Disable GPIO outputs */
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gpio_direction_input(priv->eecs);
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gpio_direction_input(priv->eesk);
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/* EEPROM has 16-bit registers, but pumps out two registers in one request */
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return (reg & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
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}
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/* Write chip configuration register */
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/* Follow 93c66 timing and chip's min EEPROM timing requirement */
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static void
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adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
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{
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/* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
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u8 bits[4] = {
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(0x05 << 5) | (reg >> 3),
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(reg << 5) | (u8)(val >> 11),
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(u8)(val >> 3),
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(u8)(val << 5)
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};
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/* Enable GPIO outputs with all pins to 0 */
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gpio_direction_output(priv->eecs, 0);
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gpio_direction_output(priv->eesk, 0);
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gpio_direction_output(priv->eedi, 0);
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/* Write cmd. Total 27 bits */
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adm6996_gpio_write(priv, 1, bits, 27);
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/* Extra clock(s) required per datasheet */
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adm6996_gpio_adclk(priv, 2);
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/* Disable GPIO outputs */
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gpio_direction_input(priv->eecs);
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gpio_direction_input(priv->eesk);
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gpio_direction_input(priv->eedi);
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}
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static u16
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adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
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{
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struct phy_device *phydev = priv->priv;
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struct mii_bus *bus = phydev->bus;
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return bus->read(bus, PHYADDR(reg));
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}
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static void
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adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
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{
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struct phy_device *phydev = priv->priv;
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struct mii_bus *bus = phydev->bus;
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bus->write(bus, PHYADDR(reg), val);
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}
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static int
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adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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if (val->value.i > 1)
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return -EINVAL;
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priv->enable_vlan = val->value.i;
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return 0;
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};
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static int
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adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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val->value.i = priv->enable_vlan;
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return 0;
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};
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#ifdef DEBUG
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static int
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adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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if (val->value.i > 1023)
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return -EINVAL;
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priv->addr = val->value.i;
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return 0;
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};
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static int
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adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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val->value.i = priv->addr;
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return 0;
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};
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static int
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adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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if (val->value.i > 65535)
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return -EINVAL;
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w16(priv, priv->addr, val->value.i);
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return 0;
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};
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static int
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adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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val->value.i = r16(priv, priv->addr);
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return 0;
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};
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#endif /* def DEBUG */
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static int
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adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
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{
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struct adm6996_priv *priv = to_adm(dev);
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pr_devel("set_pvid port %d vlan %d\n", port, vlan);
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if (vlan > ADM_VLAN_MAX_ID)
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return -EINVAL;
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priv->pvid[port] = vlan;
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return 0;
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}
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static int
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adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
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{
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struct adm6996_priv *priv = to_adm(dev);
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pr_devel("get_pvid port %d\n", port);
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*vlan = priv->pvid[port];
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return 0;
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}
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static int
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adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
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if (val->value.i > ADM_VLAN_MAX_ID)
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return -EINVAL;
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priv->vlan_id[val->port_vlan] = val->value.i;
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return 0;
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};
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static int
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adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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pr_devel("get_vid port %d\n", val->port_vlan);
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val->value.i = priv->vlan_id[val->port_vlan];
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return 0;
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};
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static int
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adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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u8 ports = priv->vlan_table[val->port_vlan];
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u8 tagged = priv->vlan_tagged[val->port_vlan];
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int i;
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pr_devel("get_ports port_vlan %d\n", val->port_vlan);
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val->len = 0;
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for (i = 0; i < ADM_NUM_PORTS; i++) {
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struct switch_port *p;
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if (!(ports & (1 << i)))
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continue;
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p = &val->value.ports[val->len++];
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p->id = i;
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if (tagged & (1 << i))
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p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
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else
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p->flags = 0;
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}
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return 0;
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};
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static int
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adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct adm6996_priv *priv = to_adm(dev);
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u8 *ports = &priv->vlan_table[val->port_vlan];
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u8 *tagged = &priv->vlan_tagged[val->port_vlan];
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int i;
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pr_devel("set_ports port_vlan %d ports", val->port_vlan);
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*ports = 0;
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*tagged = 0;
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for (i = 0; i < val->len; i++) {
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struct switch_port *p = &val->value.ports[i];
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#ifdef DEBUG
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pr_cont(" %d%s", p->id,
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((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
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""));
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#endif
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if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
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*tagged |= (1 << p->id);
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priv->tagged_ports |= (1 << p->id);
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}
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*ports |= (1 << p->id);
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}
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#ifdef DEBUG
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pr_cont("\n");
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#endif
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return 0;
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};
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/*
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* Precondition: reg_mutex must be held
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*/
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static void
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adm6996_enable_vlan(struct adm6996_priv *priv)
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{
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u16 reg;
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reg = r16(priv, ADM_OTBE_P2_PVID);
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reg &= ~(ADM_OTBE_MASK);
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w16(priv, ADM_OTBE_P2_PVID, reg);
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reg = r16(priv, ADM_IFNTE);
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reg &= ~(ADM_IFNTE_MASK);
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w16(priv, ADM_IFNTE, reg);
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reg = r16(priv, ADM_VID_CHECK);
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reg |= ADM_VID_CHECK_MASK;
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w16(priv, ADM_VID_CHECK, reg);
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reg = r16(priv, ADM_SYSC0);
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reg |= ADM_NTTE;
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reg &= ~(ADM_RVID1);
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w16(priv, ADM_SYSC0, reg);
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reg = r16(priv, ADM_SYSC3);
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reg |= ADM_TBV;
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w16(priv, ADM_SYSC3, reg);
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}
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static void
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adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
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{
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u16 reg;
|
|
|
|
reg = r16(priv, ADM_SYSC3);
|
|
reg |= ADM_TBV;
|
|
reg |= ADM_MAC_CLONE;
|
|
w16(priv, ADM_SYSC3, reg);
|
|
}
|
|
|
|
/*
|
|
* Disable VLANs
|
|
*
|
|
* Sets VLAN mapping for port-based VLAN with all ports connected to
|
|
* eachother (this is also the power-on default).
|
|
*
|
|
* Precondition: reg_mutex must be held
|
|
*/
|
|
static void
|
|
adm6996_disable_vlan(struct adm6996_priv *priv)
|
|
{
|
|
u16 reg;
|
|
int i;
|
|
|
|
for (i = 0; i < ADM_NUM_VLANS; i++) {
|
|
reg = ADM_VLAN_FILT_MEMBER_MASK;
|
|
w16(priv, ADM_VLAN_FILT_L(i), reg);
|
|
reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
|
|
w16(priv, ADM_VLAN_FILT_H(i), reg);
|
|
}
|
|
|
|
reg = r16(priv, ADM_OTBE_P2_PVID);
|
|
reg |= ADM_OTBE_MASK;
|
|
w16(priv, ADM_OTBE_P2_PVID, reg);
|
|
reg = r16(priv, ADM_IFNTE);
|
|
reg |= ADM_IFNTE_MASK;
|
|
w16(priv, ADM_IFNTE, reg);
|
|
reg = r16(priv, ADM_VID_CHECK);
|
|
reg &= ~(ADM_VID_CHECK_MASK);
|
|
w16(priv, ADM_VID_CHECK, reg);
|
|
reg = r16(priv, ADM_SYSC0);
|
|
reg &= ~(ADM_NTTE);
|
|
reg |= ADM_RVID1;
|
|
w16(priv, ADM_SYSC0, reg);
|
|
reg = r16(priv, ADM_SYSC3);
|
|
reg &= ~(ADM_TBV);
|
|
w16(priv, ADM_SYSC3, reg);
|
|
}
|
|
|
|
/*
|
|
* Disable VLANs
|
|
*
|
|
* Sets VLAN mapping for port-based VLAN with all ports connected to
|
|
* eachother (this is also the power-on default).
|
|
*
|
|
* Precondition: reg_mutex must be held
|
|
*/
|
|
static void
|
|
adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
|
|
{
|
|
u16 reg;
|
|
int i;
|
|
|
|
for (i = 0; i < ADM_NUM_VLANS; i++) {
|
|
w16(priv, ADM_VLAN_MAP(i), 0);
|
|
}
|
|
|
|
reg = r16(priv, ADM_SYSC3);
|
|
reg &= ~(ADM_TBV);
|
|
reg &= ~(ADM_MAC_CLONE);
|
|
w16(priv, ADM_SYSC3, reg);
|
|
}
|
|
|
|
/*
|
|
* Precondition: reg_mutex must be held
|
|
*/
|
|
static void
|
|
adm6996_apply_port_pvids(struct adm6996_priv *priv)
|
|
{
|
|
u16 reg;
|
|
int i;
|
|
|
|
for (i = 0; i < ADM_NUM_PORTS; i++) {
|
|
reg = r16(priv, adm_portcfg[i]);
|
|
reg &= ~(ADM_PORTCFG_PVID_MASK);
|
|
reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
|
|
if (priv->model == ADM6996L) {
|
|
if (priv->tagged_ports & (1 << i))
|
|
reg |= (1 << 4);
|
|
else
|
|
reg &= ~(1 << 4);
|
|
}
|
|
w16(priv, adm_portcfg[i], reg);
|
|
}
|
|
|
|
w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
|
|
w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
|
|
reg = r16(priv, ADM_OTBE_P2_PVID);
|
|
reg &= ~(ADM_P2_PVID_MASK);
|
|
reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
|
|
w16(priv, ADM_OTBE_P2_PVID, reg);
|
|
reg = ADM_P3_PVID_VAL(priv->pvid[3]);
|
|
reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
|
|
w16(priv, ADM_P3_P4_PVID, reg);
|
|
reg = r16(priv, ADM_P5_PVID);
|
|
reg &= ~(ADM_P2_PVID_MASK);
|
|
reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
|
|
w16(priv, ADM_P5_PVID, reg);
|
|
}
|
|
|
|
/*
|
|
* Precondition: reg_mutex must be held
|
|
*/
|
|
static void
|
|
adm6996_apply_vlan_filters(struct adm6996_priv *priv)
|
|
{
|
|
u8 ports, tagged;
|
|
u16 vid, reg;
|
|
int i;
|
|
|
|
for (i = 0; i < ADM_NUM_VLANS; i++) {
|
|
vid = priv->vlan_id[i];
|
|
ports = priv->vlan_table[i];
|
|
tagged = priv->vlan_tagged[i];
|
|
|
|
if (ports == 0) {
|
|
/* Disable VLAN entry */
|
|
w16(priv, ADM_VLAN_FILT_H(i), 0);
|
|
w16(priv, ADM_VLAN_FILT_L(i), 0);
|
|
continue;
|
|
}
|
|
|
|
reg = ADM_VLAN_FILT_MEMBER(ports);
|
|
reg |= ADM_VLAN_FILT_TAGGED(tagged);
|
|
w16(priv, ADM_VLAN_FILT_L(i), reg);
|
|
reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
|
|
w16(priv, ADM_VLAN_FILT_H(i), reg);
|
|
}
|
|
}
|
|
|
|
static void
|
|
adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
|
|
{
|
|
u8 ports;
|
|
u16 reg;
|
|
int i;
|
|
|
|
for (i = 0; i < ADM_NUM_VLANS; i++) {
|
|
ports = priv->vlan_table[i];
|
|
|
|
if (ports == 0) {
|
|
/* Disable VLAN entry */
|
|
w16(priv, ADM_VLAN_MAP(i), 0);
|
|
continue;
|
|
} else {
|
|
reg = ADM_VLAN_FILT(ports);
|
|
w16(priv, ADM_VLAN_MAP(i), reg);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
adm6996_hw_apply(struct switch_dev *dev)
|
|
{
|
|
struct adm6996_priv *priv = to_adm(dev);
|
|
|
|
pr_devel("hw_apply\n");
|
|
|
|
mutex_lock(&priv->reg_mutex);
|
|
|
|
if (!priv->enable_vlan) {
|
|
if (priv->vlan_enabled) {
|
|
if (priv->model == ADM6996L)
|
|
adm6996_disable_vlan_6996l(priv);
|
|
else
|
|
adm6996_disable_vlan(priv);
|
|
priv->vlan_enabled = 0;
|
|
}
|
|
goto out;
|
|
}
|
|
|
|
if (!priv->vlan_enabled) {
|
|
if (priv->model == ADM6996L)
|
|
adm6996_enable_vlan_6996l(priv);
|
|
else
|
|
adm6996_enable_vlan(priv);
|
|
priv->vlan_enabled = 1;
|
|
}
|
|
|
|
adm6996_apply_port_pvids(priv);
|
|
if (priv->model == ADM6996L)
|
|
adm6996_apply_vlan_filters_6996l(priv);
|
|
else
|
|
adm6996_apply_vlan_filters(priv);
|
|
|
|
out:
|
|
mutex_unlock(&priv->reg_mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Reset the switch
|
|
*
|
|
* The ADM6996 can't do a software-initiated reset, so we just initialise the
|
|
* registers we support in this driver.
|
|
*
|
|
* Precondition: reg_mutex must be held
|
|
*/
|
|
static void
|
|
adm6996_perform_reset (struct adm6996_priv *priv)
|
|
{
|
|
int i;
|
|
|
|
/* initialize port and vlan settings */
|
|
for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
|
|
w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
|
|
ADM_PORTCFG_PVID(0));
|
|
}
|
|
w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
|
|
|
|
if (priv->model == ADM6996M || priv->model == ADM6996FC) {
|
|
/* reset all PHY ports */
|
|
for (i = 0; i < ADM_PHY_PORTS; i++) {
|
|
w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
|
|
}
|
|
}
|
|
|
|
priv->enable_vlan = 0;
|
|
priv->vlan_enabled = 0;
|
|
|
|
for (i = 0; i < ADM_NUM_PORTS; i++) {
|
|
priv->pvid[i] = 0;
|
|
}
|
|
|
|
for (i = 0; i < ADM_NUM_VLANS; i++) {
|
|
priv->vlan_id[i] = i;
|
|
priv->vlan_table[i] = 0;
|
|
priv->vlan_tagged[i] = 0;
|
|
}
|
|
|
|
if (priv->model == ADM6996M) {
|
|
/* Clear VLAN priority map so prio's are unused */
|
|
w16 (priv, ADM_VLAN_PRIOMAP, 0);
|
|
|
|
adm6996_disable_vlan(priv);
|
|
adm6996_apply_port_pvids(priv);
|
|
} else if (priv->model == ADM6996L) {
|
|
/* Clear VLAN priority map so prio's are unused */
|
|
w16 (priv, ADM_VLAN_PRIOMAP, 0);
|
|
|
|
adm6996_disable_vlan_6996l(priv);
|
|
adm6996_apply_port_pvids(priv);
|
|
}
|
|
}
|
|
|
|
static int
|
|
adm6996_reset_switch(struct switch_dev *dev)
|
|
{
|
|
struct adm6996_priv *priv = to_adm(dev);
|
|
|
|
pr_devel("reset\n");
|
|
|
|
mutex_lock(&priv->reg_mutex);
|
|
adm6996_perform_reset (priv);
|
|
mutex_unlock(&priv->reg_mutex);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
adm6996_get_port_link(struct switch_dev *dev, int port,
|
|
struct switch_port_link *link)
|
|
{
|
|
struct adm6996_priv *priv = to_adm(dev);
|
|
|
|
u16 reg = 0;
|
|
|
|
if (port >= ADM_NUM_PORTS)
|
|
return -EINVAL;
|
|
|
|
switch (port) {
|
|
case 0:
|
|
reg = r16(priv, ADM_PS0);
|
|
break;
|
|
case 1:
|
|
reg = r16(priv, ADM_PS0);
|
|
reg = reg >> 8;
|
|
break;
|
|
case 2:
|
|
reg = r16(priv, ADM_PS1);
|
|
break;
|
|
case 3:
|
|
reg = r16(priv, ADM_PS1);
|
|
reg = reg >> 8;
|
|
break;
|
|
case 4:
|
|
reg = r16(priv, ADM_PS1);
|
|
reg = reg >> 12;
|
|
break;
|
|
case 5:
|
|
reg = r16(priv, ADM_PS2);
|
|
/* Bits 0, 1, 3 and 4. */
|
|
reg = (reg & 3) | ((reg & 24) >> 1);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
link->link = reg & ADM_PS_LS;
|
|
if (!link->link)
|
|
return 0;
|
|
link->aneg = true;
|
|
link->duplex = reg & ADM_PS_DS;
|
|
link->tx_flow = reg & ADM_PS_FCS;
|
|
link->rx_flow = reg & ADM_PS_FCS;
|
|
if (reg & ADM_PS_SS)
|
|
link->speed = SWITCH_PORT_SPEED_100;
|
|
else
|
|
link->speed = SWITCH_PORT_SPEED_10;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
adm6996_sw_get_port_mib(struct switch_dev *dev,
|
|
const struct switch_attr *attr,
|
|
struct switch_val *val)
|
|
{
|
|
struct adm6996_priv *priv = to_adm(dev);
|
|
int port;
|
|
char *buf = priv->buf;
|
|
int i, len = 0;
|
|
u32 reg = 0;
|
|
|
|
port = val->port_vlan;
|
|
if (port >= ADM_NUM_PORTS)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&priv->mib_lock);
|
|
|
|
len += snprintf(buf + len, sizeof(priv->buf) - len,
|
|
"Port %d MIB counters\n",
|
|
port);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
|
|
reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
|
|
reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
|
|
len += snprintf(buf + len, sizeof(priv->buf) - len,
|
|
"%-12s: %lu\n",
|
|
adm6996_mibs[i].name,
|
|
reg);
|
|
}
|
|
|
|
mutex_unlock(&priv->mib_lock);
|
|
|
|
val->value.s = buf;
|
|
val->len = len;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct switch_attr adm6996_globals[] = {
|
|
{
|
|
.type = SWITCH_TYPE_INT,
|
|
.name = "enable_vlan",
|
|
.description = "Enable VLANs",
|
|
.set = adm6996_set_enable_vlan,
|
|
.get = adm6996_get_enable_vlan,
|
|
},
|
|
#ifdef DEBUG
|
|
{
|
|
.type = SWITCH_TYPE_INT,
|
|
.name = "addr",
|
|
.description =
|
|
"Direct register access: set register address (0 - 1023)",
|
|
.set = adm6996_set_addr,
|
|
.get = adm6996_get_addr,
|
|
},
|
|
{
|
|
.type = SWITCH_TYPE_INT,
|
|
.name = "data",
|
|
.description =
|
|
"Direct register access: read/write to register (0 - 65535)",
|
|
.set = adm6996_set_data,
|
|
.get = adm6996_get_data,
|
|
},
|
|
#endif /* def DEBUG */
|
|
};
|
|
|
|
static struct switch_attr adm6996_port[] = {
|
|
{
|
|
.type = SWITCH_TYPE_STRING,
|
|
.name = "mib",
|
|
.description = "Get port's MIB counters",
|
|
.set = NULL,
|
|
.get = adm6996_sw_get_port_mib,
|
|
},
|
|
};
|
|
|
|
static struct switch_attr adm6996_vlan[] = {
|
|
{
|
|
.type = SWITCH_TYPE_INT,
|
|
.name = "vid",
|
|
.description = "VLAN ID",
|
|
.set = adm6996_set_vid,
|
|
.get = adm6996_get_vid,
|
|
},
|
|
};
|
|
|
|
static struct switch_dev_ops adm6996_ops = {
|
|
.attr_global = {
|
|
.attr = adm6996_globals,
|
|
.n_attr = ARRAY_SIZE(adm6996_globals),
|
|
},
|
|
.attr_port = {
|
|
.attr = adm6996_port,
|
|
.n_attr = ARRAY_SIZE(adm6996_port),
|
|
},
|
|
.attr_vlan = {
|
|
.attr = adm6996_vlan,
|
|
.n_attr = ARRAY_SIZE(adm6996_vlan),
|
|
},
|
|
.get_port_pvid = adm6996_get_pvid,
|
|
.set_port_pvid = adm6996_set_pvid,
|
|
.get_vlan_ports = adm6996_get_ports,
|
|
.set_vlan_ports = adm6996_set_ports,
|
|
.apply_config = adm6996_hw_apply,
|
|
.reset_switch = adm6996_reset_switch,
|
|
.get_port_link = adm6996_get_port_link,
|
|
};
|
|
|
|
static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
|
|
{
|
|
struct switch_dev *swdev;
|
|
u16 test, old;
|
|
|
|
if (!priv->model) {
|
|
/* Detect type of chip */
|
|
old = r16(priv, ADM_VID_CHECK);
|
|
test = old ^ (1 << 12);
|
|
w16(priv, ADM_VID_CHECK, test);
|
|
test ^= r16(priv, ADM_VID_CHECK);
|
|
if (test & (1 << 12)) {
|
|
/*
|
|
* Bit 12 of this register is read-only.
|
|
* This is the FC model.
|
|
*/
|
|
priv->model = ADM6996FC;
|
|
} else {
|
|
/* Bit 12 is read-write. This is the M model. */
|
|
priv->model = ADM6996M;
|
|
w16(priv, ADM_VID_CHECK, old);
|
|
}
|
|
}
|
|
|
|
swdev = &priv->dev;
|
|
swdev->name = (adm6996_model_name[priv->model]);
|
|
swdev->cpu_port = ADM_CPU_PORT;
|
|
swdev->ports = ADM_NUM_PORTS;
|
|
swdev->vlans = ADM_NUM_VLANS;
|
|
swdev->ops = &adm6996_ops;
|
|
swdev->alias = alias;
|
|
|
|
/* The ADM6996L connected through GPIOs does not support any switch
|
|
status calls */
|
|
if (priv->model == ADM6996L) {
|
|
adm6996_ops.attr_port.n_attr = 0;
|
|
adm6996_ops.get_port_link = NULL;
|
|
}
|
|
|
|
pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
|
|
|
|
mutex_lock(&priv->reg_mutex);
|
|
adm6996_perform_reset (priv);
|
|
mutex_unlock(&priv->reg_mutex);
|
|
|
|
if (priv->model == ADM6996M || priv->model == ADM6996L) {
|
|
return register_switch(swdev, netdev);
|
|
}
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
static int adm6996_config_init(struct phy_device *pdev)
|
|
{
|
|
struct adm6996_priv *priv;
|
|
int ret;
|
|
|
|
pdev->supported = ADVERTISED_100baseT_Full;
|
|
pdev->advertising = ADVERTISED_100baseT_Full;
|
|
|
|
if (pdev->addr != 0) {
|
|
pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
|
|
, pdev->attached_dev->name, pdev->addr);
|
|
return 0;
|
|
}
|
|
|
|
priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
mutex_init(&priv->reg_mutex);
|
|
mutex_init(&priv->mib_lock);
|
|
priv->priv = pdev;
|
|
priv->read = adm6996_read_mii_reg;
|
|
priv->write = adm6996_write_mii_reg;
|
|
|
|
ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
pdev->priv = priv;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Warning: phydev->priv is NULL if phydev->addr != 0
|
|
*/
|
|
static int adm6996_read_status(struct phy_device *phydev)
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{
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phydev->speed = SPEED_100;
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phydev->duplex = DUPLEX_FULL;
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phydev->link = 1;
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return 0;
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}
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/*
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* Warning: phydev->priv is NULL if phydev->addr != 0
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*/
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static int adm6996_config_aneg(struct phy_device *phydev)
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{
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return 0;
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}
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static int adm6996_fixup(struct phy_device *dev)
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{
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struct mii_bus *bus = dev->bus;
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u16 reg;
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/* Our custom registers are at PHY addresses 0-10. Claim those. */
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if (dev->addr > 10)
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return 0;
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/* look for the switch on the bus */
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reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
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if (reg != ADM_SIG0_VAL)
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return 0;
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reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
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if (reg != ADM_SIG1_VAL)
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return 0;
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dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
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return 0;
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}
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static int adm6996_probe(struct phy_device *pdev)
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{
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return 0;
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}
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static void adm6996_remove(struct phy_device *pdev)
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{
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struct adm6996_priv *priv = phy_to_adm(pdev);
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if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
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unregister_switch(&priv->dev);
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}
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static struct phy_driver adm6996_phy_driver = {
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.name = "Infineon ADM6996",
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.phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
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.phy_id_mask = 0xffffffff,
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.features = PHY_BASIC_FEATURES,
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.probe = adm6996_probe,
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.remove = adm6996_remove,
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.config_init = &adm6996_config_init,
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.config_aneg = &adm6996_config_aneg,
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.read_status = &adm6996_read_status,
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.driver = { .owner = THIS_MODULE,},
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};
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static int adm6996_gpio_probe(struct platform_device *pdev)
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{
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struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
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struct adm6996_priv *priv;
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int ret;
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if (!pdata)
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return -EINVAL;
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priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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mutex_init(&priv->reg_mutex);
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mutex_init(&priv->mib_lock);
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priv->eecs = pdata->eecs;
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priv->eedi = pdata->eedi;
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priv->eerc = pdata->eerc;
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priv->eesk = pdata->eesk;
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priv->model = pdata->model;
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priv->read = adm6996_read_gpio_reg;
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priv->write = adm6996_write_gpio_reg;
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ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
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if (ret)
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return ret;
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ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
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if (ret)
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return ret;
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ret = devm_gpio_request(&pdev->dev, priv->eerc, "adm_eerc");
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if (ret)
|
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return ret;
|
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ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
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if (ret)
|
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return ret;
|
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|
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ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
|
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if (ret < 0)
|
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return ret;
|
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|
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platform_set_drvdata(pdev, priv);
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|
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return 0;
|
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}
|
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|
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static int adm6996_gpio_remove(struct platform_device *pdev)
|
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{
|
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struct adm6996_priv *priv = platform_get_drvdata(pdev);
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|
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if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
|
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unregister_switch(&priv->dev);
|
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|
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return 0;
|
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}
|
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|
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static struct platform_driver adm6996_gpio_driver = {
|
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.probe = adm6996_gpio_probe,
|
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.remove = adm6996_gpio_remove,
|
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.driver = {
|
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.name = "adm6996_gpio",
|
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},
|
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};
|
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|
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static int __init adm6996_init(void)
|
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{
|
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int err;
|
|
|
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phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
|
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err = phy_driver_register(&adm6996_phy_driver);
|
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if (err)
|
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return err;
|
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|
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err = platform_driver_register(&adm6996_gpio_driver);
|
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if (err)
|
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phy_driver_unregister(&adm6996_phy_driver);
|
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|
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return err;
|
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}
|
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|
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static void __exit adm6996_exit(void)
|
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{
|
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platform_driver_unregister(&adm6996_gpio_driver);
|
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phy_driver_unregister(&adm6996_phy_driver);
|
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}
|
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|
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module_init(adm6996_init);
|
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module_exit(adm6996_exit);
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