mirror of https://github.com/hak5/openwrt.git
139 lines
3.5 KiB
C
139 lines
3.5 KiB
C
/*
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* MikroTik RouterBOARD 2011 support
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*
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* Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#define RB_ROUTERBOOT_OFFSET 0x0000
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#define RB_ROUTERBOOT_SIZE 0xb000
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#define RB_HARD_CFG_OFFSET 0xb000
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#define RB_HARD_CFG_SIZE 0x1000
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#define RB_BIOS_OFFSET 0xd000
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#define RB_BIOS_SIZE 0x2000
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#define RB_SOFT_CFG_OFFSET 0xf000
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#define RB_SOFT_CFG_SIZE 0x1000
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static struct mtd_partition rb2011_spi_partitions[] = {
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{
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.name = "routerboot",
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.offset = RB_ROUTERBOOT_OFFSET,
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.size = RB_ROUTERBOOT_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "hard_config",
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.offset = RB_HARD_CFG_OFFSET,
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.size = RB_HARD_CFG_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bios",
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.offset = RB_BIOS_OFFSET,
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.size = RB_BIOS_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "soft_config",
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.offset = RB_SOFT_CFG_OFFSET,
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.size = RB_SOFT_CFG_SIZE,
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}
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};
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static struct flash_platform_data rb2011_spi_flash_data = {
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.parts = rb2011_spi_partitions,
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.nr_parts = ARRAY_SIZE(rb2011_spi_partitions),
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};
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static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data rb2011_ar8327_data = {
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.pad0_cfg = &rb2011_ar8327_pad0_cfg,
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.cpuport_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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}
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};
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static struct mdio_board_info rb2011_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &rb2011_ar8327_data,
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},
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};
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static void __init rb2011_gmac_setup(void)
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{
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void __iomem *base;
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u32 t;
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base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
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t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
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AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
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t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
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__raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
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iounmap(base);
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}
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static void __init rb2011_setup(void)
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{
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ath79_register_m25p80(&rb2011_spi_flash_data);
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rb2011_gmac_setup();
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(rb2011_mdio0_info,
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ARRAY_SIZE(rb2011_mdio0_info));
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/* GMAC0 is connected to an ar8327 switch */
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ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_register_eth(0);
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/* GMAC1 is connected to the internal switch */
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ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_register_eth(1);
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}
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MIPS_MACHINE(ATH79_MACH_RB_2011L, "2011L", "MikroTik RouterBOARD 2011L",
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rb2011_setup);
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