mirror of https://github.com/hak5/openwrt.git
163 lines
4.7 KiB
Diff
163 lines
4.7 KiB
Diff
From 74631102645df8984acbdf67b731e4d437f27fed Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linus.walleij@linaro.org>
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Date: Thu, 11 Oct 2018 20:06:23 +0200
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Subject: [PATCH 08/18] ARM: dts: Enable Gemini flash access
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Some Gemini platforms have a parallel NOR flash which conflicts
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with use cases reusing some of the flash lines (such as CE1)
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for GPIO.
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Fix this on the D-Link DIR-685 and Itian SQ201 by creating
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"enabled" and "disabled" states for the flash pin control
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handle, and rely on the flash handling code to switch this
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in and out when accessed so these lines can be used
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for GPIO when flash is not accessed, and enable flash
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access.
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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arch/arm/boot/dts/gemini-dlink-dir-685.dts | 35 +++++++++++++++-------
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arch/arm/boot/dts/gemini-sq201.dts | 31 ++++++++++---------
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2 files changed, 41 insertions(+), 25 deletions(-)
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--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
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+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
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@@ -64,7 +64,6 @@
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gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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- /* Collides with pflash CE1, not so cool */
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cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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@@ -253,15 +252,18 @@
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soc {
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flash@30000000 {
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/*
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- * Flash access is by default disabled, because it
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- * collides with the Chip Enable signal for the display
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- * panel, that reuse the parallel flash Chip Select 1
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- * (CS1). Enabling flash makes graphics stop working.
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- *
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- * We might be able to hack around this by letting
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- * GPIO poke around in the flash controller registers.
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+ * Flash access collides with the Chip Enable signal for
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+ * the display panel, that reuse the parallel flash Chip
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+ * Select 1 (CS1). We switch the pin control state so we
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+ * enable these pins for flash access only when we need
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+ * then, and when disabled they can be used for GPIO which
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+ * is what the display panel needs.
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*/
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- /* status = "okay"; */
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+ status = "okay";
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+ pinctrl-names = "enabled", "disabled";
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+ pinctrl-0 = <&pflash_default_pins>;
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+ pinctrl-1 = <&pflash_disabled_pins>;
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+
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/* 32MB of flash */
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reg = <0x30000000 0x02000000>;
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@@ -327,7 +329,6 @@
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"gpio0cgrp",
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"gpio0egrp",
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"gpio0fgrp",
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- "gpio0ggrp",
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"gpio0hgrp";
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};
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};
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@@ -342,6 +343,18 @@
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groups = "gpio1bgrp";
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};
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};
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+ /*
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+ * These GPIO groups will be mapped in over some
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+ * of the flash pins when the flash is not in
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+ * active use.
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+ */
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+ pflash_disabled_pins: pinctrl-pflash-disabled {
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+ mux {
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+ function = "gpio0";
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+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
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+ "gpio0kgrp";
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+ };
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+ };
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pinctrl-gmii {
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mux {
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function = "gmii";
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@@ -430,7 +443,7 @@
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};
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display-controller@6a000000 {
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- status = "okay";
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+ status = "disabled";
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port@0 {
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reg = <0>;
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--- a/arch/arm/boot/dts/gemini-sq201.dts
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+++ b/arch/arm/boot/dts/gemini-sq201.dts
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@@ -41,14 +41,12 @@
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compatible = "gpio-leds";
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led-green-info {
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label = "sq201:green:info";
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- /* Conflict with parallel flash */
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-green-usb {
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label = "sq201:green:usb";
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- /* Conflict with parallel and NAND flash */
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gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "usb-host";
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@@ -126,15 +124,10 @@
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soc {
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flash@30000000 {
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- /*
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- * Flash access can be enabled, with the side effect
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- * of disabling access to GPIO LED on GPIO0[20] which
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- * reuse one of the parallel flash chip select lines.
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- * Also the default firmware on the machine has the
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- * problem that since it uses the flash, the two LEDS
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- * on the right become numb.
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- */
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- /* status = "okay"; */
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+ status = "okay";
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+ pinctrl-names = "enabled", "disabled";
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+ pinctrl-0 = <&pflash_default_pins>;
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+ pinctrl-1 = <&pflash_disabled_pins>;
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/* 16MB of flash */
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reg = <0x30000000 0x01000000>;
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@@ -184,9 +177,7 @@
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mux {
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function = "gpio0";
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groups = "gpio0fgrp",
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- "gpio0ggrp",
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- "gpio0hgrp",
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- "gpio0kgrp";
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+ "gpio0hgrp";
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};
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};
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/*
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@@ -199,6 +190,18 @@
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groups = "gpio1dgrp";
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};
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};
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+ /*
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+ * These GPIO groups will be mapped in over some
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+ * of the flash pins when the flash is not in
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+ * active use.
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+ */
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+ pflash_disabled_pins: pinctrl-pflash-disabled {
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+ mux {
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+ function = "gpio0";
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+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
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+ "gpio0kgrp";
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+ };
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+ };
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pinctrl-gmii {
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mux {
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function = "gmii";
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