mirror of https://github.com/hak5/openwrt.git
240 lines
6.5 KiB
C
240 lines
6.5 KiB
C
/*
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* LZMA compressed kernel decompressor for bcm947xx boards
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*
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* Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*
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* Please note, this was code based on the bunzip2 decompressor code
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* by Manuel Novoa III (mjn3@codepoet.org), although the only thing left
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* is an idea and part of original vendor code
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*
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*
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* 12-Mar-2005 Mineharu Takahara <mtakahar@yahoo.com>
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* pass actual output size to decoder (stream mode
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* compressed input is not a requirement anymore)
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*
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* 24-Apr-2005 Oleg I. Vdovikin
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* reordered functions using lds script, removed forward decl
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*
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* 24-Mar-2007 Gabor Juhos
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* pass original values of the a0,a1,a2,a3 registers to the kernel
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*
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*/
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#include "LzmaDecode.h"
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#define BCM4710_FLASH 0x1fc00000 /* Flash */
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
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#define Index_Invalidate_I 0x00
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#define Index_Writeback_Inv_D 0x01
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#define cache_unroll(base,op) \
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__asm__ __volatile__( \
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".set noreorder;\n" \
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".set mips3;\n" \
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"cache %1, (%0);\n" \
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".set mips0;\n" \
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".set reorder\n" \
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: \
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: "r" (base), \
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"i" (op));
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static __inline__ void blast_icache(unsigned long size, unsigned long lsize)
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{
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unsigned long start = KSEG0;
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unsigned long end = (start + size);
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while(start < end) {
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cache_unroll(start,Index_Invalidate_I);
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start += lsize;
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}
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}
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static __inline__ void blast_dcache(unsigned long size, unsigned long lsize)
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{
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unsigned long start = KSEG0;
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unsigned long end = (start + size);
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while(start < end) {
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cache_unroll(start,Index_Writeback_Inv_D);
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start += lsize;
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}
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}
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#define TRX_MAGIC 0x30524448 /* "HDR0" */
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struct trx_header {
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unsigned int magic; /* "HDR0" */
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unsigned int len; /* Length of file including header */
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unsigned int crc32; /* 32-bit CRC from flag_version to end of file */
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unsigned int flag_version; /* 0:15 flags, 16:31 version */
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unsigned int offsets[3]; /* Offsets of partitions from start of header */
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};
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/* beyound the image end, size not known in advance */
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extern unsigned char workspace[];
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unsigned int offset;
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unsigned char *data;
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typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1,
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unsigned long reg_a2, unsigned long reg_a3);
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/* flash access should be aligned, so wrapper is used */
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/* read byte from the flash, all accesses are 32-bit aligned */
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static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
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{
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static unsigned int val;
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if (((unsigned int)offset % 4) == 0) {
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val = *(unsigned int *)data;
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data += 4;
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}
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*bufferSize = 1;
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*buffer = ((unsigned char *)&val) + (offset++ & 3);
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return LZMA_RESULT_OK;
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}
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static __inline__ unsigned char get_byte(void)
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{
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unsigned char *buffer;
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UInt32 fake;
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return read_byte(0, &buffer, &fake), *buffer;
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}
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/* should be the first function */
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void entry(unsigned long reg_a0, unsigned long reg_a1,
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unsigned long reg_a2, unsigned long reg_a3,
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unsigned long icache_size, unsigned long icache_lsize,
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unsigned long dcache_size, unsigned long dcache_lsize)
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{
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unsigned int i; /* temp value */
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unsigned int lc; /* literal context bits */
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unsigned int lp; /* literal pos state bits */
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unsigned int pb; /* pos state bits */
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unsigned int osize; /* uncompressed size */
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ILzmaInCallback callback;
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callback.Read = read_byte;
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uart_write_str("decompress kernel ... ");
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/* look for trx header, 32-bit data access */
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for (data = ((unsigned char *) KSEG1ADDR(BCM4710_FLASH));
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((struct trx_header *)data)->magic != TRX_MAGIC; data += 65536);
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/* compressed kernel is in the partition 0 or 1 */
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if (((struct trx_header *)data)->offsets[1] > 65536)
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data += ((struct trx_header *)data)->offsets[0];
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else
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data += ((struct trx_header *)data)->offsets[1];
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offset = 0;
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/* lzma args */
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i = get_byte();
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lc = i % 9, i = i / 9;
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lp = i % 5, pb = i / 5;
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/* skip rest of the LZMA coder property */
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for (i = 0; i < 4; i++)
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get_byte();
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/* read the lower half of uncompressed size in the header */
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osize = ((unsigned int)get_byte()) +
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((unsigned int)get_byte() << 8) +
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((unsigned int)get_byte() << 16) +
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((unsigned int)get_byte() << 24);
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/* skip rest of the header (upper half of uncompressed size) */
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for (i = 0; i < 4; i++)
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get_byte();
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/* decompress kernel */
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if (LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
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(unsigned char*)LOADADDR, osize, &i) == LZMA_RESULT_OK)
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{
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blast_dcache(dcache_size, dcache_lsize);
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blast_icache(icache_size, icache_lsize);
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/* Jump to load address */
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uart_write_str("ok\r\n");
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((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3);
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}
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uart_write_str("failed\r\n");
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while (1 );
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}
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/* *********************************************************************
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*
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* ADM5120 UART driver File: dev_adm_uart.c
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*
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* This is a console device driver for an ADM5120 UART
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*
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*********************************************************************
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*
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* Copyright 2006
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* Compex Systems. All rights reserved.
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*
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********************************************************************* */
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#define READCSR(r) *(volatile UInt32 *)(0xB2600000+(r))
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#define WRITECSR(r,v) *(volatile UInt32 *)(0xB2600000+(r)) = v
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#define UART_DR_REG 0x00
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#define UART_FR_REG 0x18
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#define UART_TX_FIFO_FULL 0x20
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int uart_write(int val)
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{
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WRITECSR(UART_DR_REG, val);
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while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) );
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return 0;
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}
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int uart_write_str(char * str)
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{
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while ( *str != 0 ) {
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uart_write ( *str++ );
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}
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return 0;
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}
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int uart_write_hex(int val)
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{
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int i;
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int tmp;
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uart_write_str("0x");
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for ( i=0 ; i<8 ; i++ ) {
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tmp = (val >> ((7-i) * 4 )) & 0xf;
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tmp = tmp < 10 ? (tmp + '0') : (tmp + 'A' - 10);
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uart_write(tmp);
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}
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uart_write_str("\r\n");
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return 0;
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}
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