mirror of https://github.com/hak5/openwrt.git
37 lines
1.2 KiB
Diff
37 lines
1.2 KiB
Diff
From 3ba0020ea70ffb5503eff1823be7fa5ceda38286 Mon Sep 17 00:00:00 2001
|
|
From: Shunli Wang <shunli.wang@mediatek.com>
|
|
Date: Tue, 5 Jan 2016 14:30:22 +0800
|
|
Subject: [PATCH 011/102] reset: mediatek: mt2701 reset driver
|
|
|
|
In infrasys and perifsys, there are many reset
|
|
control bits for kinds of modules. These bits are
|
|
used as actual reset controllers to be registered
|
|
into kernel's generic reset controller framework.
|
|
|
|
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
|
|
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
|
|
---
|
|
drivers/clk/mediatek/clk-mt2701.c | 4 ++++
|
|
1 file changed, 4 insertions(+)
|
|
|
|
--- a/drivers/clk/mediatek/clk-mt2701.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701.c
|
|
@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(str
|
|
if (r)
|
|
pr_err("%s(): could not register clock provider: %d\n",
|
|
__func__, r);
|
|
+
|
|
+ mtk_register_reset_controller(node, 2, 0x30);
|
|
}
|
|
CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
|
|
|
|
@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(stru
|
|
if (r)
|
|
pr_err("%s(): could not register clock provider: %d\n",
|
|
__func__, r);
|
|
+
|
|
+ mtk_register_reset_controller(node, 2, 0x0);
|
|
}
|
|
CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
|
|
|