mirror of https://github.com/hak5/openwrt.git
368 lines
9.0 KiB
C
368 lines
9.0 KiB
C
/*
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* NAND flash driver for the MikroTik RouterBOARD 750
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*
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/mach-rb750.h>
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#define DRV_NAME "rb750-nand"
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#define DRV_VERSION "0.1.0"
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#define DRV_DESC "NAND flash driver for the RouterBOARD 750"
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#define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0)
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#define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE)
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#define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE)
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#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE)
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#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE)
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#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY)
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#define RB750_NAND_DATA_SHIFT 1
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#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT)
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#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
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#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \
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RB750_NAND_NRE | RB750_NAND_NWE)
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struct rb750_nand_info {
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struct nand_chip chip;
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struct mtd_info mtd;
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struct rb7xx_nand_platform_data *pdata;
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};
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static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd)
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{
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return container_of(mtd, struct rb750_nand_info, mtd);
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}
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/*
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* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
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* will not be able to find the kernel that we load.
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*/
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static struct nand_ecclayout rb750_nand_ecclayout = {
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.eccbytes = 6,
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.eccpos = { 8, 9, 10, 13, 14, 15 },
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.oobavail = 9,
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.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
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};
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static struct mtd_partition rb750_nand_partitions[] = {
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{
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.name = "booter",
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.offset = 0,
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.size = (256 * 1024),
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "kernel",
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.offset = (256 * 1024),
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.size = (4 * 1024 * 1024) - (256 * 1024),
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}, {
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.name = "rootfs",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static void rb750_nand_write(const u8 *buf, unsigned len)
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{
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void __iomem *base = ath79_gpio_base;
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u32 out;
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u32 t;
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unsigned i;
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/* set data lines to output mode */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
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out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
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out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
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for (i = 0; i != len; i++) {
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u32 data;
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data = buf[i];
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data <<= RB750_NAND_DATA_SHIFT;
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data |= out;
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__raw_writel(data, base + AR71XX_GPIO_REG_OUT);
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__raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
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/* flush write */
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__raw_readl(base + AR71XX_GPIO_REG_OUT);
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}
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/* set data lines to input mode */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
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/* flush write */
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__raw_readl(base + AR71XX_GPIO_REG_OE);
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}
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static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
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const u8 *verify_buf)
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{
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void __iomem *base = ath79_gpio_base;
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unsigned i;
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for (i = 0; i < len; i++) {
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u8 data;
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/* activate RE line */
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__raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
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/* flush write */
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__raw_readl(base + AR71XX_GPIO_REG_CLEAR);
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/* read input lines */
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data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
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RB750_NAND_DATA_SHIFT;
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/* deactivate RE line */
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__raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
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if (read_buf)
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read_buf[i] = data;
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else if (verify_buf && verify_buf[i] != data)
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return -EFAULT;
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}
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return 0;
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}
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static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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{
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struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd);
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void __iomem *base = ath79_gpio_base;
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u32 t;
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if (chip >= 0) {
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rbinfo->pdata->enable_pins();
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/* set input mode for data lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t & ~RB750_NAND_INPUT_BITS,
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base + AR71XX_GPIO_REG_OE);
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/* deactivate RE and WE lines */
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__raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
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base + AR71XX_GPIO_REG_SET);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_SET);
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/* activate CE line */
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__raw_writel(rbinfo->pdata->nce_line,
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base + AR71XX_GPIO_REG_CLEAR);
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} else {
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/* deactivate CE line */
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__raw_writel(rbinfo->pdata->nce_line,
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base + AR71XX_GPIO_REG_SET);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_SET);
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
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base + AR71XX_GPIO_REG_OE);
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rbinfo->pdata->disable_pins();
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}
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}
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static int rb750_nand_dev_ready(struct mtd_info *mtd)
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{
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void __iomem *base = ath79_gpio_base;
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return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
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}
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static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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if (ctrl & NAND_CTRL_CHANGE) {
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void __iomem *base = ath79_gpio_base;
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u32 t;
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t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
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t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
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t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
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t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
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__raw_writel(t, base + AR71XX_GPIO_REG_OUT);
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/* flush write */
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__raw_readl(base + AR71XX_GPIO_REG_OUT);
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}
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if (cmd != NAND_CMD_NONE) {
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u8 t = cmd;
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rb750_nand_write(&t, 1);
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}
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}
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static u8 rb750_nand_read_byte(struct mtd_info *mtd)
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{
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u8 data = 0;
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rb750_nand_read_verify(&data, 1, NULL);
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return data;
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}
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static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
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{
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rb750_nand_read_verify(buf, len, NULL);
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}
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static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
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{
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rb750_nand_write(buf, len);
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}
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static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len)
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{
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return rb750_nand_read_verify(NULL, len, buf);
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}
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static void __init rb750_nand_gpio_init(struct rb750_nand_info *info)
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{
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void __iomem *base = ath79_gpio_base;
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u32 out;
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u32 t;
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out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
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/* setup output levels */
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__raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
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base + AR71XX_GPIO_REG_SET);
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__raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
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base + AR71XX_GPIO_REG_CLEAR);
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/* setup input lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
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/* setup output lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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t |= RB750_NAND_OUTPUT_BITS;
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t |= info->pdata->nce_line;
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__raw_writel(t, base + AR71XX_GPIO_REG_OE);
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info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
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}
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static int __devinit rb750_nand_probe(struct platform_device *pdev)
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{
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struct rb750_nand_info *info;
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struct rb7xx_nand_platform_data *pdata;
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int ret;
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printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
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pdata = pdev->dev.platform_data;
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if (!pdata)
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return -EINVAL;
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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info->chip.priv = &info;
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info->mtd.priv = &info->chip;
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info->mtd.owner = THIS_MODULE;
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info->chip.select_chip = rb750_nand_select_chip;
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info->chip.cmd_ctrl = rb750_nand_cmd_ctrl;
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info->chip.dev_ready = rb750_nand_dev_ready;
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info->chip.read_byte = rb750_nand_read_byte;
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info->chip.write_buf = rb750_nand_write_buf;
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info->chip.read_buf = rb750_nand_read_buf;
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info->chip.verify_buf = rb750_nand_verify_buf;
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info->chip.chip_delay = 25;
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info->chip.ecc.mode = NAND_ECC_SOFT;
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info->chip.options |= NAND_NO_AUTOINCR;
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info->pdata = pdata;
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platform_set_drvdata(pdev, info);
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rb750_nand_gpio_init(info);
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ret = nand_scan_ident(&info->mtd, 1, NULL);
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if (ret) {
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ret = -ENXIO;
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goto err_free_info;
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}
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if (info->mtd.writesize == 512)
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info->chip.ecc.layout = &rb750_nand_ecclayout;
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ret = nand_scan_tail(&info->mtd);
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if (ret) {
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return -ENXIO;
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goto err_set_drvdata;
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}
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ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
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ARRAY_SIZE(rb750_nand_partitions));
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if (ret)
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goto err_release_nand;
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return 0;
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err_release_nand:
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nand_release(&info->mtd);
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err_set_drvdata:
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platform_set_drvdata(pdev, NULL);
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err_free_info:
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kfree(info);
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return ret;
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}
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static int __devexit rb750_nand_remove(struct platform_device *pdev)
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{
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struct rb750_nand_info *info = platform_get_drvdata(pdev);
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nand_release(&info->mtd);
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platform_set_drvdata(pdev, NULL);
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kfree(info);
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return 0;
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}
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static struct platform_driver rb750_nand_driver = {
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.probe = rb750_nand_probe,
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.remove = __devexit_p(rb750_nand_remove),
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init rb750_nand_init(void)
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{
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return platform_driver_register(&rb750_nand_driver);
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}
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static void __exit rb750_nand_exit(void)
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{
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platform_driver_unregister(&rb750_nand_driver);
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}
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module_init(rb750_nand_init);
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module_exit(rb750_nand_exit);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_VERSION(DRV_VERSION);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_LICENSE("GPL v2");
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