mirror of https://github.com/hak5/openwrt.git
165 lines
4.4 KiB
Diff
165 lines
4.4 KiB
Diff
From 61f87edd9a522d70d979f679d11849d1dc20cedb Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.org>
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Date: Thu, 23 Mar 2017 16:34:46 +0000
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Subject: [PATCH 108/454] bcm2835-aux: Add aux interrupt controller
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The AUX block has a shared interrupt line with a register indicating
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which devices have active IRQs. Expose this as a nested interrupt
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controller to avoid sharing problems.
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See: https://github.com/raspberrypi/linux/issues/1484
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https://github.com/raspberrypi/linux/issues/1573
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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drivers/clk/bcm/clk-bcm2835-aux.c | 120 ++++++++++++++++++++++++++++++
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1 file changed, 120 insertions(+)
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--- a/drivers/clk/bcm/clk-bcm2835-aux.c
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+++ b/drivers/clk/bcm/clk-bcm2835-aux.c
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@@ -17,17 +17,107 @@
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#include <linux/clk/bcm2835.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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+#include <linux/interrupt.h>
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+#include <linux/irqdomain.h>
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+#include <linux/of_irq.h>
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#include <dt-bindings/clock/bcm2835-aux.h>
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#define BCM2835_AUXIRQ 0x00
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#define BCM2835_AUXENB 0x04
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+#define BCM2835_AUXIRQ_NUM_IRQS 3
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+
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+#define BCM2835_AUXIRQ_UART_IRQ 0
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+#define BCM2835_AUXIRQ_SPI1_IRQ 1
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+#define BCM2835_AUXIRQ_SPI2_IRQ 2
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+
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+#define BCM2835_AUXIRQ_UART_MASK 0x01
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+#define BCM2835_AUXIRQ_SPI1_MASK 0x02
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+#define BCM2835_AUXIRQ_SPI2_MASK 0x04
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+
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+#define BCM2835_AUXIRQ_ALL_MASK \
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+ (BCM2835_AUXIRQ_UART_MASK | \
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+ BCM2835_AUXIRQ_SPI1_MASK | \
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+ BCM2835_AUXIRQ_SPI2_MASK)
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+
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+struct auxirq_state {
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+ void __iomem *status;
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+ u32 enables;
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+ struct irq_domain *domain;
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+ struct regmap *local_regmap;
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+};
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+
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+static struct auxirq_state auxirq __read_mostly;
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+
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+static irqreturn_t bcm2835_auxirq_handler(int irq, void *dev_id)
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+{
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+ u32 stat = readl_relaxed(auxirq.status);
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+ u32 masked = stat & auxirq.enables;
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+
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+ if (masked & BCM2835_AUXIRQ_UART_MASK)
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+ generic_handle_irq(irq_linear_revmap(auxirq.domain,
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+ BCM2835_AUXIRQ_UART_IRQ));
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+
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+ if (masked & BCM2835_AUXIRQ_SPI1_MASK)
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+ generic_handle_irq(irq_linear_revmap(auxirq.domain,
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+ BCM2835_AUXIRQ_SPI1_IRQ));
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+
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+ if (masked & BCM2835_AUXIRQ_SPI2_MASK)
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+ generic_handle_irq(irq_linear_revmap(auxirq.domain,
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+ BCM2835_AUXIRQ_SPI2_IRQ));
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+
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+ return (masked & BCM2835_AUXIRQ_ALL_MASK) ? IRQ_HANDLED : IRQ_NONE;
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+}
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+
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+static int bcm2835_auxirq_xlate(struct irq_domain *d,
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+ struct device_node *ctrlr,
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+ const u32 *intspec, unsigned int intsize,
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+ unsigned long *out_hwirq,
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+ unsigned int *out_type)
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+{
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+ if (WARN_ON(intsize != 1))
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+ return -EINVAL;
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+
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+ if (WARN_ON(intspec[0] >= BCM2835_AUXIRQ_NUM_IRQS))
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+ return -EINVAL;
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+
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+ *out_hwirq = intspec[0];
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+ *out_type = IRQ_TYPE_NONE;
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+ return 0;
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+}
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+
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+static void bcm2835_auxirq_mask(struct irq_data *data)
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+{
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+
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+ auxirq.enables &= ~(1 << hwirq);
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+}
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+
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+static void bcm2835_auxirq_unmask(struct irq_data *data)
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+{
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+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
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+
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+ auxirq.enables |= (1 << hwirq);
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+}
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+
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+static struct irq_chip bcm2835_auxirq_chip = {
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+ .name = "bcm2835-auxirq",
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+ .irq_mask = bcm2835_auxirq_mask,
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+ .irq_unmask = bcm2835_auxirq_unmask,
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+};
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+
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+static const struct irq_domain_ops bcm2835_auxirq_ops = {
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+ .xlate = bcm2835_auxirq_xlate//irq_domain_xlate_onecell
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+};
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+
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static int bcm2835_aux_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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+ struct device_node *node = dev->of_node;
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struct clk_hw_onecell_data *onecell;
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const char *parent;
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struct clk *parent_clk;
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+ int parent_irq;
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struct resource *res;
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void __iomem *reg, *gate;
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@@ -41,6 +131,36 @@ static int bcm2835_aux_clk_probe(struct
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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+ parent_irq = irq_of_parse_and_map(node, 0);
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+ if (parent_irq) {
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+ int ret;
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+ int i;
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+
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+ /* Manage the AUX irq as well */
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+ auxirq.status = reg + BCM2835_AUXIRQ;
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+ auxirq.domain = irq_domain_add_linear(node,
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+ BCM2835_AUXIRQ_NUM_IRQS,
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+ &bcm2835_auxirq_ops,
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+ NULL);
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+ if (!auxirq.domain)
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+ return -ENXIO;
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+
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+ for (i = 0; i < BCM2835_AUXIRQ_NUM_IRQS; i++) {
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+ unsigned int irq = irq_create_mapping(auxirq.domain, i);
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+
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+ if (irq == 0)
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+ return -ENXIO;
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+
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+ irq_set_chip_and_handler(irq, &bcm2835_auxirq_chip,
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+ handle_level_irq);
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+ }
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+
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+ ret = devm_request_irq(dev, parent_irq, bcm2835_auxirq_handler,
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+ 0, "bcm2835-auxirq", NULL);
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+ if (ret)
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+ return ret;
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+ }
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+
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onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) *
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BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
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if (!onecell)
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