mirror of https://github.com/hak5/openwrt.git
43 lines
1.2 KiB
Diff
43 lines
1.2 KiB
Diff
From fe26f3e7d1329fc2a5ac14808dbecb7d324d0a41 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 27 Mar 2013 20:56:22 +0100
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Subject: [PATCH 3/5] MIPS: ralink: process PCI pinmux group
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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arch/mips/ralink/pinmux.c | 14 +++++++++++++-
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1 file changed, 13 insertions(+), 1 deletion(-)
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--- a/arch/mips/ralink/pinmux.c
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+++ b/arch/mips/ralink/pinmux.c
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@@ -29,7 +29,7 @@ void ralink_pinmux(void)
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const __be32 *wdt;
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struct device_node *np;
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struct property *prop;
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- const char *uart, *pin;
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+ const char *uart, *pci, *pin;
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u32 mode = 0;
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np = of_find_compatible_node(NULL, NULL, "ralink,rt3050-sysc");
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@@ -76,5 +76,20 @@ void ralink_pinmux(void)
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if (wdt && *wdt && rt_pinmux.wdt_reset)
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rt_pinmux.wdt_reset();
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+ pci = NULL;
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+ if (rt_pinmux.pci)
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+ of_property_read_string(np, "ralink,pcimux", &pci);
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+
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+ if (pci) {
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+ int m = ralink_mux_mask(pci, rt_pinmux.pci);
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+ mode &= ~(rt_pinmux.pci_mask << rt_pinmux.pci_shift);
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+ if (m) {
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+ mode |= (m << rt_pinmux.pci_shift);
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+ pr_debug("pinmux: registered pcimux \"%s\"\n", pci);
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+ } else {
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+ pr_debug("pinmux: registered pcimux \"gpio\"\n");
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+ }
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+ }
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+
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rt_sysc_w32(mode, SYSC_REG_GPIO_MODE);
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}
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