mirror of https://github.com/hak5/openwrt.git
275 lines
7.3 KiB
Diff
275 lines
7.3 KiB
Diff
From 8f3768a7c649526f821a6a4cd32cc44a8e7fa317 Mon Sep 17 00:00:00 2001
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From: Scott Wood <scottwood@freescale.com>
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Date: Fri, 15 Jan 2016 07:34:33 +0000
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Subject: [PATCH 26/70] cpufreq: qoriq: Don't look at clock implementation
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details
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Get the CPU clock's potential parent clocks from the clock interface
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itself, rather than manually parsing the clocks property to find a
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phandle, looking at the clock-names property of that, and assuming that
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those are valid parent clocks for the cpu clock.
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This is necessary now that the clocks are generated based on the clock
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driver's knowledge of the chip rather than a fragile device-tree
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description of the mux options.
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We can now rely on the clock driver to ensure that the mux only exposes
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options that are valid. The cpufreq driver was currently being overly
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conservative in some cases -- for example, the "min_cpufreq =
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get_bus_freq()" restriction only applies to chips with erratum
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A-004510, and whether the freq_mask used on p5020 is needed depends on
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the actual frequencies of the PLLs (FWIW, p5040 has a similar
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limitation but its .freq_mask was zero) -- and the frequency mask
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mechanism made assumptions about particular parent clock indices that
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are no longer valid.
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Signed-off-by: Scott Wood <scottwood@freescale.com>
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Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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drivers/cpufreq/qoriq-cpufreq.c | 138 ++++++++++++---------------------------
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1 file changed, 41 insertions(+), 97 deletions(-)
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--- a/drivers/cpufreq/qoriq-cpufreq.c
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+++ b/drivers/cpufreq/qoriq-cpufreq.c
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@@ -11,6 +11,7 @@
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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+#include <linux/clk-provider.h>
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#include <linux/cpufreq.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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@@ -35,53 +36,20 @@ struct cpu_data {
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struct cpufreq_frequency_table *table;
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};
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+/*
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+ * Don't use cpufreq on this SoC -- used when the SoC would have otherwise
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+ * matched a more generic compatible.
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+ */
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+#define SOC_BLACKLIST 1
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+
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/**
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* struct soc_data - SoC specific data
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- * @freq_mask: mask the disallowed frequencies
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- * @flag: unique flags
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+ * @flags: SOC_xxx
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*/
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struct soc_data {
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- u32 freq_mask[4];
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- u32 flag;
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-};
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-
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-#define FREQ_MASK 1
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-/* see hardware specification for the allowed frqeuencies */
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-static const struct soc_data sdata[] = {
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- { /* used by p2041 and p3041 */
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- .freq_mask = {0x8, 0x8, 0x2, 0x2},
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- .flag = FREQ_MASK,
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- },
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- { /* used by p5020 */
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- .freq_mask = {0x8, 0x2},
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- .flag = FREQ_MASK,
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- },
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- { /* used by p4080, p5040 */
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- .freq_mask = {0},
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- .flag = 0,
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- },
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+ u32 flags;
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};
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-/*
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- * the minimum allowed core frequency, in Hz
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- * for chassis v1.0, >= platform frequency
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- * for chassis v2.0, >= platform frequency / 2
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- */
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-static u32 min_cpufreq;
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-static const u32 *fmask;
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-
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-#if defined(CONFIG_ARM)
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-static int get_cpu_physical_id(int cpu)
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-{
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- return topology_core_id(cpu);
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-}
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-#else
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-static int get_cpu_physical_id(int cpu)
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-{
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- return get_hard_smp_processor_id(cpu);
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-}
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-#endif
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-
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static u32 get_bus_freq(void)
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{
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struct device_node *soc;
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@@ -99,9 +67,10 @@ static u32 get_bus_freq(void)
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return sysfreq;
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}
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-static struct device_node *cpu_to_clk_node(int cpu)
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+static struct clk *cpu_to_clk(int cpu)
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{
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- struct device_node *np, *clk_np;
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+ struct device_node *np;
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+ struct clk *clk;
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if (!cpu_present(cpu))
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return NULL;
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@@ -110,37 +79,28 @@ static struct device_node *cpu_to_clk_no
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if (!np)
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return NULL;
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- clk_np = of_parse_phandle(np, "clocks", 0);
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- if (!clk_np)
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- return NULL;
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-
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+ clk = of_clk_get(np, 0);
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of_node_put(np);
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-
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- return clk_np;
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+ return clk;
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}
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/* traverse cpu nodes to get cpu mask of sharing clock wire */
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static void set_affected_cpus(struct cpufreq_policy *policy)
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{
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- struct device_node *np, *clk_np;
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struct cpumask *dstp = policy->cpus;
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+ struct clk *clk;
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int i;
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- np = cpu_to_clk_node(policy->cpu);
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- if (!np)
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- return;
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-
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for_each_present_cpu(i) {
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- clk_np = cpu_to_clk_node(i);
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- if (!clk_np)
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+ clk = cpu_to_clk(i);
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+ if (IS_ERR(clk)) {
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+ pr_err("%s: no clock for cpu %d\n", __func__, i);
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continue;
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+ }
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- if (clk_np == np)
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+ if (clk_is_match(policy->clk, clk))
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cpumask_set_cpu(i, dstp);
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-
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- of_node_put(clk_np);
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}
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- of_node_put(np);
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}
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/* reduce the duplicated frequencies in frequency table */
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@@ -198,7 +158,7 @@ static int qoriq_cpufreq_cpu_init(struct
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{
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struct device_node *np, *pnode;
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int i, count, ret;
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- u32 freq, mask;
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+ u32 freq;
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struct clk *clk;
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struct cpufreq_frequency_table *table;
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struct cpu_data *data;
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@@ -219,17 +179,12 @@ static int qoriq_cpufreq_cpu_init(struct
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goto err_nomem2;
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}
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- pnode = of_parse_phandle(np, "clocks", 0);
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- if (!pnode) {
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- pr_err("%s: could not get clock information\n", __func__);
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- goto err_nomem2;
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- }
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+ count = clk_get_num_parents(policy->clk);
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- count = of_property_count_strings(pnode, "clock-names");
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data->pclk = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
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if (!data->pclk) {
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pr_err("%s: no memory\n", __func__);
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- goto err_node;
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+ goto err_nomem2;
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}
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table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
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@@ -238,23 +193,11 @@ static int qoriq_cpufreq_cpu_init(struct
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goto err_pclk;
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}
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- if (fmask)
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- mask = fmask[get_cpu_physical_id(cpu)];
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- else
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- mask = 0x0;
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-
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for (i = 0; i < count; i++) {
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- clk = of_clk_get(pnode, i);
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+ clk = clk_get_parent_by_index(policy->clk, i);
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data->pclk[i] = clk;
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freq = clk_get_rate(clk);
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- /*
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- * the clock is valid if its frequency is not masked
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- * and large than minimum allowed frequency.
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- */
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- if (freq < min_cpufreq || (mask & (1 << i)))
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- table[i].frequency = CPUFREQ_ENTRY_INVALID;
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- else
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- table[i].frequency = freq / 1000;
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+ table[i].frequency = freq / 1000;
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table[i].driver_data = i;
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}
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freq_table_redup(table, count);
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@@ -288,10 +231,7 @@ err_nomem1:
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kfree(table);
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err_pclk:
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kfree(data->pclk);
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-err_node:
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- of_node_put(pnode);
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err_nomem2:
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- policy->driver_data = NULL;
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kfree(data);
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err_np:
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of_node_put(np);
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@@ -332,12 +272,20 @@ static struct cpufreq_driver qoriq_cpufr
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.attr = cpufreq_generic_attr,
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};
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+static const struct soc_data blacklist = {
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+ .flags = SOC_BLACKLIST,
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+};
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+
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static const struct of_device_id node_matches[] __initconst = {
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- { .compatible = "fsl,p2041-clockgen", .data = &sdata[0], },
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- { .compatible = "fsl,p3041-clockgen", .data = &sdata[0], },
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- { .compatible = "fsl,p5020-clockgen", .data = &sdata[1], },
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- { .compatible = "fsl,p4080-clockgen", .data = &sdata[2], },
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- { .compatible = "fsl,p5040-clockgen", .data = &sdata[2], },
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+ /* e6500 cannot use cpufreq due to erratum A-008083 */
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+ { .compatible = "fsl,b4420-clockgen", &blacklist },
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+ { .compatible = "fsl,b4860-clockgen", &blacklist },
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+ { .compatible = "fsl,t2080-clockgen", &blacklist },
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+ { .compatible = "fsl,t4240-clockgen", &blacklist },
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+
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+ { .compatible = "fsl,ls1021a-clockgen", },
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+ { .compatible = "fsl,p4080-clockgen", },
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+ { .compatible = "fsl,qoriq-clockgen-1.0", },
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{ .compatible = "fsl,qoriq-clockgen-2.0", },
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{}
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};
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@@ -355,16 +303,12 @@ static int __init qoriq_cpufreq_init(voi
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match = of_match_node(node_matches, np);
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data = match->data;
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- if (data) {
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- if (data->flag)
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- fmask = data->freq_mask;
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- min_cpufreq = get_bus_freq();
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- } else {
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- min_cpufreq = get_bus_freq() / 2;
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- }
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of_node_put(np);
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+ if (data && data->flags & SOC_BLACKLIST)
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+ return -ENODEV;
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+
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ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
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if (!ret)
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pr_info("Freescale QorIQ CPU frequency scaling driver\n");
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