mirror of https://github.com/hak5/openwrt.git
2c05915b24
L2 cache via L2X0 cache controller available on some ARM boards can provide a performance boost in some situations but decrease performance in others. This adds a kernel cmdline to disable L2X0 for cns3xxx based boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 34874 |
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mach-cns3xxx |