mirror of https://github.com/hak5/openwrt.git
118 lines
3.5 KiB
Diff
118 lines
3.5 KiB
Diff
From 788daf43a9078fc592eddfa0b959bc92b03bbb53 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
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Date: Tue, 27 Sep 2016 01:00:08 +0200
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Subject: [PATCH] i2c: bcm2835: Add support for dynamic clock
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Support a dynamic clock by reading the frequency and setting the
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divisor in the transfer function instead of during probe.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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Reviewed-by: Martin Sperl <kernel@martin.sperl.org>
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---
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drivers/i2c/busses/i2c-bcm2835.c | 51 +++++++++++++++++++++++++---------------
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1 file changed, 32 insertions(+), 19 deletions(-)
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--- a/drivers/i2c/busses/i2c-bcm2835.c
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+++ b/drivers/i2c/busses/i2c-bcm2835.c
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@@ -58,6 +58,7 @@ struct bcm2835_i2c_dev {
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void __iomem *regs;
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struct clk *clk;
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int irq;
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+ u32 bus_clk_rate;
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struct i2c_adapter adapter;
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struct completion completion;
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struct i2c_msg *curr_msg;
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@@ -78,6 +79,30 @@ static inline u32 bcm2835_i2c_readl(stru
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return readl(i2c_dev->regs + reg);
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}
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+static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
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+{
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+ u32 divider;
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+
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+ divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
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+ i2c_dev->bus_clk_rate);
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+ /*
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+ * Per the datasheet, the register is always interpreted as an even
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+ * number, by rounding down. In other words, the LSB is ignored. So,
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+ * if the LSB is set, increment the divider to avoid any issue.
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+ */
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+ if (divider & 1)
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+ divider++;
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+ if ((divider < BCM2835_I2C_CDIV_MIN) ||
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+ (divider > BCM2835_I2C_CDIV_MAX)) {
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+ dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
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+ return -EINVAL;
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+ }
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+
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+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
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+
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+ return 0;
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+}
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+
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static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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@@ -224,7 +249,7 @@ static int bcm2835_i2c_xfer(struct i2c_a
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{
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struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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unsigned long time_left;
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- int i;
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+ int i, ret;
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for (i = 0; i < (num - 1); i++)
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if (msgs[i].flags & I2C_M_RD) {
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@@ -233,6 +258,10 @@ static int bcm2835_i2c_xfer(struct i2c_a
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return -EOPNOTSUPP;
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}
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+ ret = bcm2835_i2c_set_divider(i2c_dev);
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+ if (ret)
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+ return ret;
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+
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i2c_dev->curr_msg = msgs;
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i2c_dev->num_msgs = num;
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reinit_completion(&i2c_dev->completion);
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@@ -282,7 +311,6 @@ static int bcm2835_i2c_probe(struct plat
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{
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struct bcm2835_i2c_dev *i2c_dev;
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struct resource *mem, *irq;
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- u32 bus_clk_rate, divider;
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int ret;
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struct i2c_adapter *adap;
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@@ -306,28 +334,13 @@ static int bcm2835_i2c_probe(struct plat
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}
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ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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- &bus_clk_rate);
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+ &i2c_dev->bus_clk_rate);
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if (ret < 0) {
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dev_warn(&pdev->dev,
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"Could not read clock-frequency property\n");
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- bus_clk_rate = 100000;
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+ i2c_dev->bus_clk_rate = 100000;
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}
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- divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate);
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- /*
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- * Per the datasheet, the register is always interpreted as an even
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- * number, by rounding down. In other words, the LSB is ignored. So,
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- * if the LSB is set, increment the divider to avoid any issue.
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- */
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- if (divider & 1)
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- divider++;
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- if ((divider < BCM2835_I2C_CDIV_MIN) ||
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- (divider > BCM2835_I2C_CDIV_MAX)) {
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- dev_err(&pdev->dev, "Invalid clock-frequency\n");
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- return -ENODEV;
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- }
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
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-
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irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!irq) {
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dev_err(&pdev->dev, "No IRQ resource\n");
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