mirror of https://github.com/hak5/openwrt.git
235 lines
6.8 KiB
Diff
235 lines
6.8 KiB
Diff
From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
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From: John Crispin <john@phrozen.org>
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Date: Tue, 24 Jul 2018 14:45:49 +0200
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Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
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Add a driver to setup the USB phy on Qualcom Dakota SoCs.
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The driver sets up HS and SS phys. In case of HS some magic values need to
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be written to magic offsets. These were taken from the SDK driver.
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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drivers/phy/qualcomm/Kconfig | 7 ++
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drivers/phy/qualcomm/Makefile | 1 +
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drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
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3 files changed, 196 insertions(+)
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create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
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--- a/drivers/phy/qualcomm/Kconfig
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+++ b/drivers/phy/qualcomm/Kconfig
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@@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
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depends on OF
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select GENERIC_PHY
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+config PHY_QCOM_IPQ4019_USB
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+ tristate "Qualcomm IPQ4019 USB PHY module"
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+ depends on OF && ARCH_QCOM
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+ select GENERIC_PHY
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+ help
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+ Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
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+
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config PHY_QCOM_IPQ806X_SATA
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tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
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depends on ARCH_QCOM
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--- /dev/null
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+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
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@@ -0,0 +1,188 @@
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+/*
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+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
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+ *
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+ * Based on code from
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+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/mutex.h>
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+#include <linux/of_platform.h>
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+#include <linux/phy/phy.h>
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+#include <linux/platform_device.h>
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+#include <linux/reset.h>
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+
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+/*
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+ * Magic registers copied from the SDK driver code
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+ */
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+#define PHY_CTRL0_ADDR 0x000
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+#define PHY_CTRL1_ADDR 0x004
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+#define PHY_CTRL2_ADDR 0x008
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+#define PHY_CTRL3_ADDR 0x00C
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+#define PHY_CTRL4_ADDR 0x010
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+#define PHY_MISC_ADDR 0x024
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+#define PHY_IPG_ADDR 0x030
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+
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+#define PHY_CTRL0_VAL 0xA4600015
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+#define PHY_CTRL1_VAL 0x09500000
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+#define PHY_CTRL2_VAL 0x00058180
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+#define PHY_CTRL3_VAL 0x6DB6DCD6
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+#define PHY_CTRL4_VAL 0x836DB6DB
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+#define PHY_MISC_VAL 0x3803FB0C
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+#define PHY_IPG_VAL 0x47323232
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+
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+struct ipq4019_usb_phy {
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+ struct device *dev;
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+ struct phy *phy;
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+ void __iomem *base;
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+ struct reset_control *por_rst;
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+ struct reset_control *srif_rst;
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+};
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+
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+static int ipq4019_ss_phy_power_off(struct phy *_phy)
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+{
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+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ reset_control_assert(phy->por_rst);
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+ msleep(10);
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+
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+ return 0;
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+}
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+
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+static int ipq4019_ss_phy_power_on(struct phy *_phy)
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+{
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+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ ipq4019_ss_phy_power_off(_phy);
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+
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+ reset_control_deassert(phy->por_rst);
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+
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+ return 0;
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+}
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+
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+static struct phy_ops ipq4019_usb_ss_phy_ops = {
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+ .power_on = ipq4019_ss_phy_power_on,
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+ .power_off = ipq4019_ss_phy_power_off,
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+};
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+
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+static int ipq4019_hs_phy_power_off(struct phy *_phy)
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+{
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+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ reset_control_assert(phy->por_rst);
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+ msleep(10);
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+
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+ reset_control_assert(phy->srif_rst);
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+ msleep(10);
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+
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+ return 0;
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+}
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+
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+static int ipq4019_hs_phy_power_on(struct phy *_phy)
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+{
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+ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
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+
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+ ipq4019_hs_phy_power_off(_phy);
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+
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+ reset_control_deassert(phy->srif_rst);
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+ msleep(10);
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+
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+ writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
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+ writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
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+ writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
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+ writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
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+ writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
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+ writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
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+ writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
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+ msleep(10);
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+
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+ reset_control_deassert(phy->por_rst);
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+
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+ return 0;
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+}
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+
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+static struct phy_ops ipq4019_usb_hs_phy_ops = {
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+ .power_on = ipq4019_hs_phy_power_on,
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+ .power_off = ipq4019_hs_phy_power_off,
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+};
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+
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+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
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+ { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
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+ { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
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+ { },
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+};
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+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
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+
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+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct resource *res;
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+ struct phy_provider *phy_provider;
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+ struct ipq4019_usb_phy *phy;
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+ const struct of_device_id *match;
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+
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+ match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
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+ if (!match)
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+ return -ENODEV;
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+
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+ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
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+ if (!phy)
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+ return -ENOMEM;
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+
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+ phy->dev = &pdev->dev;
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ phy->base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(phy->base)) {
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+ dev_err(dev, "failed to remap register memory\n");
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+ return PTR_ERR(phy->base);
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+ }
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+
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+ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
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+ if (IS_ERR(phy->por_rst)) {
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+ if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
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+ dev_err(dev, "POR reset is missing\n");
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+ return PTR_ERR(phy->por_rst);
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+ }
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+
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+ phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
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+ if (IS_ERR(phy->srif_rst))
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+ return PTR_ERR(phy->srif_rst);
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+
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+ phy->phy = devm_phy_create(dev, NULL, match->data);
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+ if (IS_ERR(phy->phy)) {
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+ dev_err(dev, "failed to create PHY\n");
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+ return PTR_ERR(phy->phy);
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+ }
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+ phy_set_drvdata(phy->phy, phy);
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+
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+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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+
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+ return PTR_ERR_OR_ZERO(phy_provider);
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+}
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+
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+static struct platform_driver ipq4019_usb_phy_driver = {
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+ .probe = ipq4019_usb_phy_probe,
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+ .driver = {
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+ .of_match_table = ipq4019_usb_phy_of_match,
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+ .name = "ipq4019-usb-phy",
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+ }
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+};
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+module_platform_driver(ipq4019_usb_phy_driver);
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+
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+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
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+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
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+MODULE_LICENSE("GPL v2");
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--- a/drivers/phy/qualcomm/Makefile
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+++ b/drivers/phy/qualcomm/Makefile
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@@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
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obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
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+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
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obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
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obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o
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obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
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