mirror of https://github.com/hak5/openwrt.git
269 lines
5.0 KiB
Plaintext
269 lines
5.0 KiB
Plaintext
#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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/* the power led can't be controlled, use the wps led instead */
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led-boot = &wps;
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led-failsafe = &wps;
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led-dsl = &dsl;
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led-internet = &internet;
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led-wifi = &wifi;
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led-usb = &usb0;
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led-usb2 = &usb2;
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};
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memory@0 {
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reg = <0x0 0x4000000>;
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};
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fpi@10000000 {
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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gphy-leds {
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lantiq,groups = "gphy0 led1", "gphy1 led1";
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lantiq,function = "gphy";
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lantiq,pull = <2>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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phy-rst {
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lantiq,pins = "io42";
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lantiq,pull = <0>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io38";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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pins_spi_default: pins_spi_default {
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spi_in {
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lantiq,groups = "spi_di";
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lantiq,function = "spi";
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};
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spi_out {
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lantiq,groups = "spi_do", "spi_clk",
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"spi_cs4";
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lantiq,function = "spi";
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lantiq,output = <1>;
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};
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};
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};
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ifxhcd@E101000 {
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status = "okay";
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gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
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lantiq,portmask = <0x3>;
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};
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ifxhcd@E106000 {
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status = "okay";
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gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
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};
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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firmware = "lantiq/vr9_phy11g_a2x.bin";
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wifi {
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label = "wifi";
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gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RFKILL>;
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linux,input-type = <EV_SW>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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/*
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power is not controllable via gpio
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*/
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dsl: dsl {
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label = "tdw89x0:green:dsl";
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gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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};
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internet: internet {
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label = "tdw89x0:green:internet";
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gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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};
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usb0: usb0 {
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label = "tdw89x0:green:usb";
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gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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};
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usb2: usb2 {
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label = "tdw89x0:green:usb2";
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gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
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};
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wps: wps {
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label = "tdw89x0:green:wps";
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gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
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};
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};
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wifi-leds {
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compatible = "gpio-leds";
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wifi: wifi {
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label = "tdw89x0:green:wifi";
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gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi {
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pinctrl-names = "default";
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pinctrl-0 = <&pins_spi_default>;
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status = "ok";
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m25p80@4 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <4 0>;
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spi-max-frequency = <33250000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x0 0x20000>;
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label = "u-boot";
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read-only;
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};
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partition@20000 {
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reg = <0x20000 0x7a0000>;
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label = "firmware";
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};
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partition@7c0000 {
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reg = <0x7c0000 0x10000>;
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label = "config";
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read-only;
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};
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ath9k_cal: partition@7d0000 {
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reg = <0x7d0000 0x30000>;
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label = "boardconfig";
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read-only;
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};
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};
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mtd-mac-address = <&ath9k_cal 0xf100>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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// gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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};
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ethernet@5 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <5>;
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phy-mode = "rgmii";
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phy-handle = <&phy5>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "gmii";
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phy-handle = <&phy11>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "gmii";
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phy-handle = <&phy13>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy5: ethernet-phy@5 {
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reg = <0x5>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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&pcie0 {
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ath9k: wifi@168c,002e {
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compatible = "pci168c,002e";
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reg = <0 0 0 0 0>;
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#gpio-cells = <2>;
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gpio-controller;
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qca,no-eeprom;
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qca,disable-5ghz;
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mtd-mac-address = <&ath9k_cal 0xf100>;
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mtd-mac-address-increment = <2>;
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};
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};
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};
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