From 6a3a89057dbb65c67be80641f13f34c599ee3863 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Thu, 8 Mar 2012 12:00:17 +0100 Subject: [PATCH 51/73] MIPS: lantiq: pci: rename variable inside * rename a global var inside the pci code --- arch/mips/pci/ops-lantiq.c | 6 +++--- arch/mips/pci/pci-lantiq.c | 6 +++--- arch/mips/pci/pci-lantiq.h | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/mips/pci/ops-lantiq.c b/arch/mips/pci/ops-lantiq.c index 1f2afb5..5cbb0cf 100644 --- a/arch/mips/pci/ops-lantiq.c +++ b/arch/mips/pci/ops-lantiq.c @@ -41,7 +41,7 @@ static int ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus, spin_lock_irqsave(&ebu_lock, flags); - cfg_base = (unsigned long) ltq_pci_mapped_cfg; + cfg_base = (unsigned long) ltq_pci_cfgbase; cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn << LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3); @@ -55,11 +55,11 @@ static int ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus, wmb(); /* clean possible Master abort */ - cfg_base = (unsigned long) ltq_pci_mapped_cfg; + cfg_base = (unsigned long) ltq_pci_cfgbase; cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; temp = ltq_r32(((u32 *)(cfg_base))); temp = swab32(temp); - cfg_base = (unsigned long) ltq_pci_mapped_cfg; + cfg_base = (unsigned long) ltq_pci_cfgbase; cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; ltq_w32(temp, ((u32 *)cfg_base)); diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c index 47b551c..efcdd45 100644 --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c @@ -65,8 +65,8 @@ #define ltq_pci_w32(x, y) ltq_w32((x), ltq_pci_membase + (y)) #define ltq_pci_r32(x) ltq_r32(ltq_pci_membase + (x)) -#define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y)) -#define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x)) +#define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_cfgbase + (y)) +#define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_cfgbase + (x)) struct ltq_pci_gpio_map { int pin; @@ -273,7 +273,7 @@ static int __devinit ltq_pci_probe(struct platform_device *pdev) pci_probe_only = 0; ltq_pci_irq_map = ltq_pci_data->irq; ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE); - ltq_pci_mapped_cfg = + ltq_pci_cfgbase = ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE); ltq_pci_controller.io_map_base = (unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1); diff --git a/arch/mips/pci/pci-lantiq.h b/arch/mips/pci/pci-lantiq.h index 66bf6cd..c4721b4 100644 --- a/arch/mips/pci/pci-lantiq.h +++ b/arch/mips/pci/pci-lantiq.h @@ -9,7 +9,7 @@ #ifndef _LTQ_PCI_H__ #define _LTQ_PCI_H__ -extern __iomem void *ltq_pci_mapped_cfg; +extern __iomem void *ltq_pci_cfgbase; extern int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); extern int ltq_pci_write_config_dword(struct pci_bus *bus, -- 1.7.9.1