From 2b2b8e163d28646cbbfde81c900fbb57d6572a11 Mon Sep 17 00:00:00 2001 From: Axel Gembe Date: Thu, 15 May 2008 11:00:43 +0200 Subject: [PATCH] bcm963xx: board support Signed-off-by: Axel Gembe --- arch/mips/Kconfig | 11 +++++++++++ arch/mips/Makefile | 4 ++++ arch/mips/kernel/cpu-probe.c | 16 ++++++++++++++++ arch/mips/mm/c-r4k.c | 7 +++++++ arch/mips/mm/tlbex.c | 4 ++++ arch/mips/pci/Makefile | 1 + include/asm-mips/bootinfo.h | 12 ++++++++++++ include/asm-mips/cpu.h | 7 ++++++- 8 files changed, 61 insertions(+), 1 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8724ed3..1b1c4bf 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -59,6 +59,17 @@ config BCM47XX help Support for BCM47XX based boards +config BCM963XX + bool "Support for Broadcom BCM963xx SoC" + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_CPU_MIPS32_R1 + select HW_HAS_PCI + select DMA_NONCOHERENT + select IRQ_CPU + help + This is a fmaily of boards based on the Broadcom MIPS32 + config MIPS_COBALT bool "Cobalt Server" select CEVT_R4K diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 1c62381..16a29e1 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -560,6 +560,10 @@ core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/ cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx load-$(CONFIG_BCM47XX) := 0xffffffff80001000 +core-$(CONFIG_BCM963XX) += arch/mips/bcm963xx/ +cflags-$(CONFIG_BCM963XX) += -Iinclude/asm-mips/mach-bcm963xx +load-$(CONFIG_BCM963XX) := 0xffffffff8001000 + # # SNI RM # diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 89c3304..6706a07 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -803,6 +803,18 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c) case PRID_IMP_BCM4710: c->cputype = CPU_BCM4710; break; +// case PRID_IMP_BCM6338: +// c->cputype = CPU_BCM6338; +// break; + case PRID_IMP_BCM6345: + c->cputype = CPU_BCM6345; + break; + case PRID_IMP_BCM6348: + c->cputype = CPU_BCM6348; + break; + case PRID_IMP_BCM6358: + c->cputype = CPU_BCM6358; + break; default: c->cputype = CPU_UNKNOWN; break; @@ -887,6 +899,10 @@ static __cpuinit const char *cpu_to_name(struct cpuinfo_mips *c) case CPU_SR71000: name = "Sandcraft SR71000"; break; case CPU_BCM3302: name = "Broadcom BCM3302"; break; case CPU_BCM4710: name = "Broadcom BCM4710"; break; + case CPU_BCM6338: name = "Broadcom BCM6338"; break; + case CPU_BCM6345: name = "Broadcom BCM6345"; break; + case CPU_BCM6348: name = "Broadcom BCM6348"; break; + case CPU_BCM6358: name = "Broadcom BCM6358"; break; case CPU_PR4450: name = "Philips PR4450"; break; case CPU_LOONGSON2: name = "ICT Loongson-2"; break; default: diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 77aefb4..23a67cb 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -882,6 +882,13 @@ static void __cpuinit probe_pcache(void) if (!(config & MIPS_CONF_M)) panic("Don't know how to probe P-caches on this cpu."); + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348 || c->cputype == CPU_BCM6358) + { + printk("bcm963xx: enabling icache and dcache...\n"); + /* Enable caches */ + write_c0_diag(read_c0_diag() | 0xC0000000); + } + /* * So we seem to be a MIPS32 or MIPS64 CPU * So let's probe the I-cache ... diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 382738c..b3b6120 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -315,6 +315,10 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_25KF: case CPU_BCM3302: case CPU_BCM4710: +// case CPU_BCM6338: + case CPU_BCM6345: + case CPU_BCM6348: + case CPU_BCM6358: case CPU_LOONGSON2: if (m4kc_tlbp_war()) uasm_i_nop(p); diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index ed0c076..57a1111 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o +obj-$(CONFIG_BCM963XX) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index e031bdf..17b2a37 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -94,6 +94,18 @@ #define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */ #define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */ +#define MACH_WRPPMC 1 + +/* + * Valid machtype for group Broadcom + */ +#define MACH_GROUP_BRCM 23 /* Broadcom */ +#define MACH_BCM47XX 1 /* Broadcom BCM47XX */ +#define MACH_BCM96338 2 +#define MACH_BCM96345 3 +#define MACH_BCM96348 4 +#define MACH_BCM96358 5 + #define CL_SIZE COMMAND_LINE_SIZE extern char *system_type; diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index bf5bbc7..e19389a 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -111,6 +111,10 @@ #define PRID_IMP_BCM4710 0x4000 #define PRID_IMP_BCM3302 0x9000 +//#define PRID_IMP_BCM6338 0x9000 +#define PRID_IMP_BCM6345 0x8000 +#define PRID_IMP_BCM6348 0x9100 +#define PRID_IMP_BCM6358 0xA000 /* * Definitions for 7:0 on legacy processors @@ -196,7 +200,8 @@ enum cpu_type_enum { */ CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, CPU_AU1550, - CPU_PR4450, CPU_BCM3302, CPU_BCM4710, + CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, + CPU_BCM6358, /* * MIPS64 class processors -- 1.5.5.1